Adapt FIFO code to deal with cases where the base GET/PUT value isn't 0.

diff --git a/src/mesa/drivers/dri/nouveau/nouveau_context.h b/src/mesa/drivers/dri/nouveau/nouveau_context.h
index 1da5b6d..85d71cb 100644 (file)
--- a/src/mesa/drivers/dri/nouveau/nouveau_context.h
+++ b/src/mesa/drivers/dri/nouveau/nouveau_context.h
@@ -43,6 +43,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 typedef struct nouveau_fifo_t{
        u_int32_t* buffer;
        u_int32_t* mmio;
+       u_int32_t put_base;
        u_int32_t current;
        u_int32_t put;
        u_int32_t free;

diff --git a/src/mesa/drivers/dri/nouveau/nouveau_fifo.c b/src/mesa/drivers/dri/nouveau/nouveau_fifo.c
index 52c227c..8d2e88b 100644 (file)
--- a/src/mesa/drivers/dri/nouveau/nouveau_fifo.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_fifo.c
@@ -46,19 +46,19 @@ void WAIT_RING(nouveauContextPtr nmesa,u_int32_t size)
 #endif
        u_int32_t fifo_get;
        while(nmesa->fifo.free < size+1) {
-               fifo_get = NV_FIFO_READ(NV03_FIFO_REGS_DMAGET);
+               fifo_get = NV_FIFO_READ_GET();
 
                if(nmesa->fifo.put >= fifo_get) {
                        nmesa->fifo.free = nmesa->fifo.max - nmesa->fifo.current;
                        if(nmesa->fifo.free < size+1) {
-                               OUT_RING(NV03_FIFO_CMD_REWIND);                                                 \
+                               OUT_RING(NV03_FIFO_CMD_JUMP | nmesa->fifo.put_base);
                                if(fifo_get <= RING_SKIPS) {
                                        if(nmesa->fifo.put <= RING_SKIPS) /* corner case - will be idle */
-                                               NV_FIFO_WRITE(NV03_FIFO_REGS_DMAPUT, RING_SKIPS + 1);
-                                       do { fifo_get = NV_FIFO_READ(NV03_FIFO_REGS_DMAGET); }
+                                               NV_FIFO_WRITE_PUT(RING_SKIPS + 1);
+                                       do { fifo_get = NV_FIFO_READ_GET(); }
                                        while(fifo_get <= RING_SKIPS);
                                }
-                               NV_FIFO_WRITE(NV03_FIFO_REGS_DMAPUT, RING_SKIPS);
+                               NV_FIFO_WRITE_PUT(RING_SKIPS);
                                nmesa->fifo.current = nmesa->fifo.put = RING_SKIPS;
                                nmesa->fifo.free = fifo_get - (RING_SKIPS + 1);
                        }
@@ -134,7 +134,11 @@ GLboolean nouveauFifoInit(nouveauContextPtr nmesa)
        }
 
        /* Setup our initial FIFO tracking params */
-       nmesa->fifo.free = fifo_init.cmdbuf_size >> 2;
+       nmesa->fifo.put_base = fifo_init.put_base;
+       nmesa->fifo.current  = 0;
+       nmesa->fifo.put      = 0;
+       nmesa->fifo.max      = (fifo_init.cmdbuf_size >> 2) - 1;
+       nmesa->fifo.free     = nmesa->fifo.max - nmesa->fifo.current;
 
        MESSAGE("Fifo init ok. Using context %d\n", fifo_init.channel);
        return GL_TRUE;

diff --git a/src/mesa/drivers/dri/nouveau/nouveau_fifo.h b/src/mesa/drivers/dri/nouveau/nouveau_fifo.h
index 0edb083..c1e9fd5 100644 (file)
--- a/src/mesa/drivers/dri/nouveau/nouveau_fifo.h
+++ b/src/mesa/drivers/dri/nouveau/nouveau_fifo.h
@@ -38,6 +38,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #define NV_FIFO_READ(reg) *(volatile u_int32_t *)(nmesa->fifo.mmio + (reg))
 #define NV_FIFO_WRITE(reg,value) *(volatile u_int32_t *)(nmesa->fifo.mmio + (reg)) = value;
+#define NV_FIFO_READ_GET() ((NV_FIFO_READ(NV03_FIFO_REGS_DMAGET) - nmesa->fifo.put_base) >> 2)
+#define NV_FIFO_WRITE_PUT(val) NV_FIFO_WRITE(NV03_FIFO_REGS_DMAPUT, ((val)<<2) + nmesa->fifo.put_base)
 
 /* 
  * Ring/fifo interface
@@ -107,11 +109,11 @@ extern void WAIT_RING(nouveauContextPtr nmesa,u_int32_t size);
 
 #define RING_AHEAD() ((nmesa->fifo.put<=nmesa->fifo.current)?(nmesa->fifo.current-nmesa->fifo.put):nmesa->fifo.max-nmesa->fifo.put+nmesa->fifo.current)
 
-#define FIRE_RING() do {                                                       \
-       if (nmesa->fifo.current!=nmesa->fifo.put) {\
-               nmesa->fifo.put=nmesa->fifo.current;\
-               NV_FIFO_WRITE(NV03_FIFO_REGS_DMAPUT,nmesa->fifo.put);\
-       }\
+#define FIRE_RING() do {                             \
+       if (nmesa->fifo.current!=nmesa->fifo.put) {  \
+               nmesa->fifo.put=nmesa->fifo.current; \
+               NV_FIFO_WRITE_PUT(nmesa->fifo.put);  \
+       }                                            \
 }while(0)
 
 extern void nouveauWaitForIdle(nouveauContextPtr nmesa);