s390.c (preferred_la_operand_p): New function.

	* config/s390/s390.c (preferred_la_operand_p): New function.
	* config/s390/s390-protos.h (preferred_la_operand_p): Declare it.
	* config/s390/s390.md ("addaddr_esame", "*la_ccclobber"): Replace by ...
	("*la_64_cc", "*la_31_cc", splitters): ... these.
	("*la_31"): Deactivate for TARGET_64BIT.
	("*la_31_and", "*la_31_and_cc"): New.

From-SVN: r57473

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 61df827..6b30902 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2002-09-24  Ulrich Weigand  <uweigand@de.ibm.com>
+
+       * config/s390/s390.c (preferred_la_operand_p): New function.
+       * config/s390/s390-protos.h (preferred_la_operand_p): Declare it.
+       * config/s390/s390.md ("addaddr_esame", "*la_ccclobber"): Replace by ...
+       ("*la_64_cc", "*la_31_cc", splitters): ... these.
+       ("*la_31"): Deactivate for TARGET_64BIT.
+       ("*la_31_and", "*la_31_and_cc"): New.
+
 2002-09-24  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 
        * real.h (real_value): Make `exp' explicitly signed.

diff --git a/gcc/config/s390/s390-protos.h b/gcc/config/s390/s390-protos.h
index f5a190f..aaf25d0 100644 (file)
--- a/gcc/config/s390/s390-protos.h
+++ b/gcc/config/s390/s390-protos.h
@@ -50,6 +50,7 @@ extern enum machine_mode s390_tm_ccmode PARAMS ((rtx, rtx, int));
 extern enum machine_mode s390_select_ccmode PARAMS ((enum rtx_code, rtx, rtx));
 extern int symbolic_reference_mentioned_p PARAMS ((rtx));
 extern int legitimate_la_operand_p PARAMS ((rtx));
+extern int preferred_la_operand_p PARAMS ((rtx, int));
 extern int legitimate_pic_operand_p PARAMS ((rtx));
 extern int legitimate_constant_p PARAMS ((rtx));
 extern int legitimate_reload_constant_p PARAMS ((rtx));

diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index a5e0ab5..50dbc36 100644 (file)
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -1756,6 +1756,34 @@ legitimate_la_operand_p (op)
   return FALSE;
 }
 
+/* Return 1 if OP is a valid operand for the LA instruction,
+   and we prefer to use LA over addition to compute it.
+   If STRICT is true, only accept operands that will never
+   change to something we cannot recognize as preferred.  */
+   
+int
+preferred_la_operand_p (op, strict)
+     register rtx op;
+     int strict;
+{
+  struct s390_address addr;
+  if (!s390_decompose_address (op, &addr))
+    return FALSE;
+
+  if (!TARGET_64BIT && !addr.pointer)
+    return FALSE;
+
+  if (addr.pointer)
+    return TRUE;
+
+  if (!strict) 
+    if ((addr.base && REG_P (addr.base) && REG_POINTER (addr.base))
+        || (addr.indx && REG_P (addr.indx) && REG_POINTER (addr.indx)))
+      return TRUE;
+
+  return FALSE;
+}
+
 /* Emit a forced load-address operation to load SRC into DST.
    This will use the LOAD ADDRESS instruction even in situations
    where legitimate_la_operand_p (SRC) returns false.  */

diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index ff2c924..650d82d 100644 (file)
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -2797,20 +2797,24 @@
 ; adddi3 instruction pattern(s).
 ;
 
-(define_insn "addaddr_esame"
-  [(set (match_operand:DI 0 "register_operand" "=a,a")
-        (plus:DI (match_operand:DI 1 "register_operand" "%a,a")
-                 (match_operand:DI 2 "nonmemory_operand" "J,a")))]
-  "TARGET_64BIT && (((REGNO (operands[1]) == STACK_POINTER_REGNUM ) ||
-     (REGNO (operands[1]) == BASE_REGISTER)) && 
-       (GET_CODE (operands[2]) == REG ||
-        CONST_OK_FOR_LETTER_P (INTVAL (operands[2]),'J')))"
-  "@
-   la\\t%0,%c2(,%1)
-   la\\t%0,0(%1,%2)"
-  [(set_attr "op_type" "RX")
-   (set_attr "atype"   "mem")
-   (set_attr "type"    "la")])
+(define_insn "*la_64_cc"
+  [(set (match_operand:DI 0 "register_operand" "=d")
+        (match_operand:QI 1 "address_operand"  "p"))
+   (clobber (reg:CC 33))]
+  "TARGET_64BIT
+   && preferred_la_operand_p (operands[1], 1)"
+  "#"
+  [(set_attr "op_type"  "RX")
+   (set_attr "atype"    "mem")
+   (set_attr "type"     "la")])
+
+(define_split
+  [(set (match_operand:DI 0 "register_operand" "")
+        (match_operand:QI 1 "address_operand" ""))
+   (clobber (reg:CC 33))]
+  "TARGET_64BIT && reload_completed
+   && preferred_la_operand_p (operands[1], 0)"
+  [(set (match_dup 0) (match_dup 1))])
 
 (define_insn "*adddi3_sign"
   [(set (match_operand:DI 0 "register_operand" "=d,d")
@@ -2997,15 +3001,24 @@
 ; addsi3 instruction pattern(s).
 ;
 
-(define_insn "*la_ccclobber"
+(define_insn "*la_31_cc"
   [(set (match_operand:SI 0 "register_operand" "=d")
         (match_operand:QI 1 "address_operand"  "p"))
    (clobber (reg:CC 33))]
-  "legitimate_la_operand_p (operands[1])"
-  "la\\t%0,%a1"
-   [(set_attr "op_type"  "RX")
-    (set_attr "atype"    "mem")
-    (set_attr "type"     "la")])
+  "!TARGET_64BIT
+   && preferred_la_operand_p (operands[1], 1)"
+  "#"
+  [(set_attr "op_type"  "RX")
+   (set_attr "atype"    "mem")
+   (set_attr "type"     "la")])
+
+(define_split
+  [(set (match_operand:SI 0 "register_operand" "")
+        (match_operand:QI 1 "address_operand" ""))
+   (clobber (reg:CC 33))]
+  "!TARGET_64BIT && reload_completed
+   && preferred_la_operand_p (operands[1], 0)"
+  [(set (match_dup 0) (match_dup 1))])
 
 (define_insn "*addsi3_imm_cc"
   [(set (reg 33) 
@@ -3149,12 +3162,37 @@
 (define_insn "*la_31"
   [(set (match_operand:SI 0 "register_operand" "=d")
         (match_operand:QI 1 "address_operand" "p"))]
-  "legitimate_la_operand_p (operands[1])"
+  "!TARGET_64BIT && legitimate_la_operand_p (operands[1])"
+  "la\\t%0,%a1"
+  [(set_attr "op_type"  "RX")
+   (set_attr "atype"    "mem")
+   (set_attr "type"     "la")])
+
+(define_insn "*la_31_and"
+  [(set (match_operand:SI 0 "register_operand" "=d")
+        (and:SI (match_operand:QI 1 "address_operand" "p")
+                (const_int 2147483647)))]
+  "!TARGET_64BIT"
   "la\\t%0,%a1"
   [(set_attr "op_type"  "RX")
    (set_attr "atype"    "mem")
    (set_attr "type"     "la")])
 
+(define_insn_and_split "*la_31_and_cc"
+  [(set (match_operand:SI 0 "register_operand" "=d")
+        (and:SI (match_operand:QI 1 "address_operand" "p")
+                (const_int 2147483647)))
+   (clobber (reg:CC 33))]
+  "!TARGET_64BIT"
+  "#"
+  "&& reload_completed"
+  [(set (match_dup 0) 
+        (and:SI (match_dup 1) (const_int 2147483647)))]
+  ""
+  [(set_attr "op_type"  "RX")
+   (set_attr "atype"    "mem")
+   (set_attr "type"     "la")])
+
 (define_insn "force_la_31"
   [(set (match_operand:SI 0 "register_operand" "=d")
         (match_operand:QI 1 "address_operand" "p"))