habanalabs: support debugfs Byte access to device DRAM
authorMoti Haimovski <mhaimovski@habana.ai>
Tue, 5 Apr 2022 08:45:51 +0000 (11:45 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 22 May 2022 19:01:18 +0000 (21:01 +0200)
The habanalabs HW requires memory resources to be used by its
internal hardware structures. These structures are allocated and
initialized by the driver. We would like to use the device HBM for
that purpose. This memory is io-remapped and accessed using the
writel()/writeb()/writew() commands.
Since some of the HW structures are one byte in size we need to
add support for the  writeb() and readb() functions in the driver.

Signed-off-by: Moti Haimovski <mhaimovski@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/misc/habanalabs/common/debugfs.c
drivers/misc/habanalabs/common/device.c
drivers/misc/habanalabs/common/habanalabs.h

index ffa613af6b0d8db2eae52d6d9e42ce6b70b16425..7c4a4d504e4c713d5a2c9da9d00ab68afb477905 100644 (file)
@@ -688,6 +688,9 @@ static void hl_access_host_mem(struct hl_device *hdev, u64 addr, u64 *val,
        case DEBUGFS_WRITE64:
                *(u64 *) phys_to_virt(addr - offset) = *val;
                break;
+       default:
+               dev_err(hdev->dev, "hostmem access-type %d id not supported\n", acc_type);
+               break;
        }
 }
 
index 9bca855b464900248215c1099f0c545bdc84ce2d..350cd61e06c1b1bc3b0b51044d9a574822007120 100644 (file)
@@ -53,6 +53,14 @@ static int hl_access_sram_dram_region(struct hl_device *hdev, u64 addr, u64 *val
        }
 
        switch (acc_type) {
+       case DEBUGFS_READ8:
+               *val = readb(hdev->pcie_bar[region->bar_id] +
+                       addr - region->region_base + region->offset_in_bar);
+               break;
+       case DEBUGFS_WRITE8:
+               writeb(*val, hdev->pcie_bar[region->bar_id] +
+                       addr - region->region_base + region->offset_in_bar);
+               break;
        case DEBUGFS_READ32:
                *val = readl(hdev->pcie_bar[region->bar_id] +
                        addr - region->region_base + region->offset_in_bar);
@@ -148,7 +156,11 @@ int hl_access_cfg_region(struct hl_device *hdev, u64 addr, u64 *val,
                WREG32(addr - cfg_region->region_base, lower_32_bits(*val));
                WREG32(addr + sizeof(u32) - cfg_region->region_base, upper_32_bits(*val));
                break;
+       default:
+               dev_err(hdev->dev, "access type %d is not supported\n", acc_type);
+               return -EOPNOTSUPP;
        }
+
        return 0;
 }
 
index 5f7e584d0f332f54f004e90a474e467577c6fecc..a8e6118c0fc7bae28fd1e33b6370c248b5834f30 100644 (file)
@@ -1100,6 +1100,8 @@ enum div_select_defs {
 };
 
 enum debugfs_access_type {
+       DEBUGFS_READ8,
+       DEBUGFS_WRITE8,
        DEBUGFS_READ32,
        DEBUGFS_WRITE32,
        DEBUGFS_READ64,