iio: imx8qxp-adc: fix irq flood when call imx8qxp_adc_read_raw()
authorFrank Li <Frank.Li@nxp.com>
Thu, 1 Dec 2022 14:01:10 +0000 (09:01 -0500)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Wed, 28 Dec 2022 17:20:03 +0000 (17:20 +0000)
irq flood happen when run
    cat /sys/bus/iio/devices/iio:device0/in_voltage1_raw

imx8qxp_adc_read_raw()
{
...
enable irq
/* adc start */
writel(1, adc->regs + IMX8QXP_ADR_ADC_SWTRIG);
^^^^ trigger irq flood.
wait_for_completion_interruptible_timeout();
readl(adc->regs + IMX8QXP_ADR_ADC_RESFIFO);
^^^^ clear irq here.
...
}

There is only FIFO watermark interrupt at this ADC controller.
IRQ line will be assert until software read data from FIFO.
So IRQ flood happen during wait_for_completion_interruptible_timeout().

Move FIFO read into irq handle to avoid irq flood.

Fixes: 1e23dcaa1a9f ("iio: imx8qxp-adc: Add driver support for NXP IMX8QXP ADC")
Cc: stable@vger.kernel.org
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Cai Huoqing <cai.huoqing@linux.dev>
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Link: https://lore.kernel.org/r/20221201140110.2653501-1-Frank.Li@nxp.com
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
drivers/iio/adc/imx8qxp-adc.c

index 36777b8..f5a0fc9 100644 (file)
@@ -86,6 +86,8 @@
 
 #define IMX8QXP_ADC_TIMEOUT            msecs_to_jiffies(100)
 
+#define IMX8QXP_ADC_MAX_FIFO_SIZE              16
+
 struct imx8qxp_adc {
        struct device *dev;
        void __iomem *regs;
@@ -95,6 +97,7 @@ struct imx8qxp_adc {
        /* Serialise ADC channel reads */
        struct mutex lock;
        struct completion completion;
+       u32 fifo[IMX8QXP_ADC_MAX_FIFO_SIZE];
 };
 
 #define IMX8QXP_ADC_CHAN(_idx) {                               \
@@ -238,8 +241,7 @@ static int imx8qxp_adc_read_raw(struct iio_dev *indio_dev,
                        return ret;
                }
 
-               *val = FIELD_GET(IMX8QXP_ADC_RESFIFO_VAL_MASK,
-                                readl(adc->regs + IMX8QXP_ADR_ADC_RESFIFO));
+               *val = adc->fifo[0];
 
                mutex_unlock(&adc->lock);
                return IIO_VAL_INT;
@@ -265,10 +267,15 @@ static irqreturn_t imx8qxp_adc_isr(int irq, void *dev_id)
 {
        struct imx8qxp_adc *adc = dev_id;
        u32 fifo_count;
+       int i;
 
        fifo_count = FIELD_GET(IMX8QXP_ADC_FCTRL_FCOUNT_MASK,
                               readl(adc->regs + IMX8QXP_ADR_ADC_FCTRL));
 
+       for (i = 0; i < fifo_count; i++)
+               adc->fifo[i] = FIELD_GET(IMX8QXP_ADC_RESFIFO_VAL_MASK,
+                               readl_relaxed(adc->regs + IMX8QXP_ADR_ADC_RESFIFO));
+
        if (fifo_count)
                complete(&adc->completion);