arm64: dts: sc7180: Support Parade ps8640 edp bridge

Add a dts fragment file to support the sc7180 boards with the second
source edp bridge, Parade ps8640.

Signed-off-by: Philip Chen <philipchen@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211008113839.v3.2.I187502fa747bc01a1c624ccf20d985fdffe9c320@changeid

diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi
new file mode 100644 (file)
index 0000000..a3d6954
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-parade-ps8640.dtsi
@@ -0,0 +1,109 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Google Trogdor dts fragment for the boards with Parade ps8640 edp bridge
+ *
+ * Copyright 2021 Google LLC.
+ */
+
+/ {
+       pp3300_brij_ps8640: pp3300-brij-ps8640 {
+               compatible = "regulator-fixed";
+               status = "okay";
+               regulator-name = "pp3300_brij_ps8640";
+
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+
+               gpio = <&tlmm 32 GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+
+               pinctrl-names = "default";
+               pinctrl-0 = <&en_pp3300_edp_brij_ps8640>;
+
+               vin-supply = <&pp3300_a>;
+       };
+};
+
+&dsi0_out {
+       remote-endpoint = <&ps8640_in>;
+};
+
+edp_brij_i2c: &i2c2 {
+       status = "okay";
+       clock-frequency = <400000>;
+
+       ps8640_bridge: bridge@8 {
+               compatible = "parade,ps8640";
+               reg = <0x8>;
+
+               powerdown-gpios = <&tlmm 104 GPIO_ACTIVE_LOW>;
+               reset-gpios = <&tlmm 11 GPIO_ACTIVE_LOW>;
+
+               pinctrl-names = "default";
+               pinctrl-0 = <&edp_brij_en>, <&edp_brij_ps8640_rst>;
+
+               vdd12-supply = <&pp1200_brij>;
+               vdd33-supply = <&pp3300_brij_ps8640>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               ps8640_in: endpoint {
+                                       remote-endpoint = <&dsi0_out>;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                               ps8640_out: endpoint {
+                                       remote-endpoint = <&panel_in_edp>;
+                               };
+                       };
+               };
+
+               aux-bus {
+                       panel: panel {
+                               /* Compatible will be filled in per-board */
+                               power-supply = <&pp3300_dx_edp>;
+                               backlight = <&backlight>;
+
+                               port {
+                                       panel_in_edp: endpoint {
+                                               remote-endpoint = <&ps8640_out>;
+                                       };
+                               };
+                       };
+               };
+       };
+};
+
+&tlmm {
+       edp_brij_ps8640_rst: edp-brij-ps8640-rst {
+               pinmux {
+                       pins = "gpio11";
+                       function = "gpio";
+               };
+
+               pinconf {
+                       pins = "gpio11";
+                       drive-strength = <2>;
+                       bias-disable;
+               };
+       };
+
+       en_pp3300_edp_brij_ps8640: en-pp3300-edp-brij-ps8640 {
+               pinmux {
+                       pins = "gpio32";
+                       function = "gpio";
+               };
+
+               pinconf {
+                       pins = "gpio32";
+                       drive-strength = <2>;
+                       bias-disable;
+               };
+       };
+};