arm64: dts: qcom: sc7180: Add SPMI PMIC arbiter device
authorKiran Gunda <kgunda@codeaurora.org>
Fri, 8 Nov 2019 09:28:20 +0000 (14:58 +0530)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Tue, 10 Dec 2019 17:41:58 +0000 (09:41 -0800)
Add SPMI PMIC arbiter device to communicate with PMICs
attached to SPMI bus.

Signed-off-by: Kiran Gunda <kgunda@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20191108092824.9773-10-rnayak@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
arch/arm64/boot/dts/qcom/sc7180.dtsi

index 6b7dd71..d13d201 100644 (file)
                        };
                };
 
+               spmi_bus: spmi@c440000 {
+                       compatible = "qcom,spmi-pmic-arb";
+                       reg = <0 0x0c440000 0 0x1100>,
+                             <0 0x0c600000 0 0x2000000>,
+                             <0 0x0e600000 0 0x100000>,
+                             <0 0x0e700000 0 0xa0000>,
+                             <0 0x0c40a000 0 0x26000>;
+                       reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
+                       interrupt-names = "periph_irq";
+                       interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
+                       qcom,ee = <0>;
+                       qcom,channel = <0>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       interrupt-controller;
+                       #interrupt-cells = <4>;
+                       cell-index = <0>;
+               };
+
                apps_smmu: iommu@15000000 {
                        compatible = "qcom,sc7180-smmu-500", "arm,mmu-500";
                        reg = <0 0x15000000 0 0x100000>;