arm64: dts: imx8mm-venice-gw7904: enable UART1 hardware flow control

On the GW7904 uart1 can use UART3_TX/RX for hardware flow control
which was the desired default configuration. Remove uart3 and configure
uart1 for hardware flow control.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts
index 93088fa1c3b9c9948d7477ef804db51fadea395f..c12e3f4f800f85e0e98b6b06aacc2a7f498b06d0 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts
@@ -636,6 +636,8 @@
 &uart1 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_uart1>;
+       cts-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>;
+       rts-gpios = <&gpio5 27 GPIO_ACTIVE_LOW>;
        status = "okay";
 };
 
@@ -646,13 +648,6 @@
        status = "okay";
 };
 
-/* off-board RS232 */
-&uart3 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart3>;
-       status = "okay";
-};
-
 &usbotg1 {
        dr_mode = "host";
        disable-over-current;
@@ -814,6 +809,8 @@
                fsl,pins = <
                        MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX     0x140
                        MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX     0x140
+                       MX8MM_IOMUXC_UART3_RXD_GPIO5_IO26       0x140 /* CTS# in */
+                       MX8MM_IOMUXC_UART3_TXD_GPIO5_IO27       0x140 /* RTS# out */
                >;
        };
 
@@ -824,13 +821,6 @@
                >;
        };
 
-       pinctrl_uart3: uart3grp {
-               fsl,pins = <
-                       MX8MM_IOMUXC_UART3_RXD_UART3_DCE_RX     0x140
-                       MX8MM_IOMUXC_UART3_TXD_UART3_DCE_TX     0x140
-               >;
-       };
-
        pinctrl_usdhc2: usdhc2grp {
                fsl,pins = <
                        MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK         0x190