DV10: GFX-Display: Fix duty cycle range

BZ: 29289

From MSIC spec, duty cycle takes 7-bit value percentage
ranging from 0 to 99%; not from 0 to 127.

Change-Id: If0e7411fa3f0e327b0ef372cf7d81624a7e0a3fd
Signed-off-by: Laurent FERT <laurentx.fert@intel.com>
Reviewed-on: http://android.intel.com:8080/40973
Reviewed-by: Fert, Laurent <laurent.fert@intel.com>
Reviewed-by: Geng, Xiujun <xiujun.geng@intel.com>
Reviewed-by: Tong, BoX <box.tong@intel.com>
Tested-by: Tong, BoX <box.tong@intel.com>
Reviewed-by: buildbot <buildbot@intel.com>
Tested-by: buildbot <buildbot@intel.com>

diff --git a/drivers/staging/mrst/drv/mdfld_dsi_output.c b/drivers/staging/mrst/drv/mdfld_dsi_output.c
index 8c1dd77..873e0fc 100755 (executable)
--- a/drivers/staging/mrst/drv/mdfld_dsi_output.c
+++ b/drivers/staging/mrst/drv/mdfld_dsi_output.c
@@ -281,17 +281,8 @@ void mdfld_dsi_brightness_control (struct drm_device *dev, int pipe, int level)
        int duty_val = 0;
        int ret = 0;
 
-       if(level == 0) {
-               duty_val = level;
-       } else {
-               duty_val = level + 1;
-       }
-
-#if defined(CONFIG_SUPPORT_TOSHIBA_MIPI_LVDS_BRIDGE)
-#define BACKLIGHT_DUTY_FACTOR 127
-#else
-#define BACKLIGHT_DUTY_FACTOR 255
-#endif
+       /* MSIC PWM duty cycle goes up to 0x63 = 99% */
+       #define BACKLIGHT_DUTY_FACTOR 0x63
 
        duty_val = level*BACKLIGHT_DUTY_FACTOR/MDFLD_DSI_BRIGHTNESS_MAX_LEVEL;