irqreturn_t ndd_irq_handler(int irq, void *dev_id)
{
struct kpc_dma_device *ldev = (struct kpc_dma_device*)dev_id;
-
+
if ((GetEngineControl(ldev) & ENG_CTL_IRQ_ACTIVE) || (ldev->desc_completed->MyDMAAddr != GetEngineCompletePtr(ldev)))
schedule_work(&ldev->irq_work);
-
+
return IRQ_HANDLED;
}
struct kpc_dma_descriptor *cur;
struct kpc_dma_device *eng = container_of(ws, struct kpc_dma_device, irq_work);
lock_engine(eng);
-
+
if (GetEngineCompletePtr(eng) == 0)
goto out;
-
+
if (eng->desc_completed->MyDMAAddr == GetEngineCompletePtr(eng))
goto out;
-
+
cur = eng->desc_completed;
do {
cur = cur->Next;
dev_dbg(&eng->pldev->dev, "Handling completed descriptor %p (acd = %p)\n", cur, cur->acd);
BUG_ON(cur == eng->desc_next); // Ordering failure.
-
+
if (cur->DescControlFlags & DMA_DESC_CTL_SOP){
eng->accumulated_bytes = 0;
eng->accumulated_flags = 0;
}
-
+
eng->accumulated_bytes += cur->DescByteCount;
if (cur->DescStatusFlags & DMA_DESC_STS_ERROR)
eng->accumulated_flags |= ACD_FLAG_ENG_ACCUM_ERROR;
-
+
if (cur->DescStatusFlags & DMA_DESC_STS_SHORT)
eng->accumulated_flags |= ACD_FLAG_ENG_ACCUM_SHORT;
-
+
if (cur->DescControlFlags & DMA_DESC_CTL_EOP){
if (cur->acd)
transfer_complete_cb(cur->acd, eng->accumulated_bytes, eng->accumulated_flags | ACD_FLAG_DONE);
}
-
+
eng->desc_completed = cur;
} while (cur->MyDMAAddr != GetEngineCompletePtr(eng));
-
+
out:
SetClearEngineControl(eng, ENG_CTL_IRQ_ACTIVE, 0);
-
+
unlock_engine(eng);
}
{
eng->desc_next = eng->desc_pool_first;
eng->desc_completed = eng->desc_pool_last;
-
+
// Setup the engine pointer registers
SetEngineNextPtr(eng, eng->desc_pool_first);
SetEngineSWPtr(eng, eng->desc_pool_first);
ClearEngineCompletePtr(eng);
-
+
WriteEngineControl(eng, ENG_CTL_DMA_ENABLE | ENG_CTL_IRQ_ENABLE);
}
unsigned int i;
int rv;
dev_dbg(&eng->pldev->dev, "Setting up DMA engine [%p]\n", eng);
-
+
caps = GetEngineCapabilities(eng);
-
+
if (WARN(!(caps & ENG_CAP_PRESENT), "setup_dma_engine() called for DMA Engine at %p which isn't present in hardware!\n", eng))
return -ENXIO;
-
+
if (caps & ENG_CAP_DIRECTION){
eng->dir = DMA_FROM_DEVICE;
} else {
eng->dir = DMA_TO_DEVICE;
}
-
+
eng->desc_pool_cnt = desc_cnt;
eng->desc_pool = dma_pool_create("KPC DMA Descriptors", &eng->pldev->dev, sizeof(struct kpc_dma_descriptor), DMA_DESC_ALIGNMENT, 4096);
-
+
eng->desc_pool_first = dma_pool_alloc(eng->desc_pool, GFP_KERNEL | GFP_DMA, &head_handle);
if (!eng->desc_pool_first){
dev_err(&eng->pldev->dev, "setup_dma_engine: couldn't allocate desc_pool_first!\n");
dma_pool_destroy(eng->desc_pool);
return -ENOMEM;
}
-
+
eng->desc_pool_first->MyDMAAddr = head_handle;
clear_desc(eng->desc_pool_first);
-
+
cur = eng->desc_pool_first;
for (i = 1 ; i < eng->desc_pool_cnt ; i++){
next = dma_pool_alloc(eng->desc_pool, GFP_KERNEL | GFP_DMA, &next_handle);
if (next == NULL)
goto done_alloc;
-
+
clear_desc(next);
next->MyDMAAddr = next_handle;
-
+
cur->DescNextDescPtr = next_handle;
cur->Next = next;
cur = next;
}
-
+
done_alloc:
// Link the last descriptor back to the first, so it's a circular linked list
cur->Next = eng->desc_pool_first;
cur->DescNextDescPtr = eng->desc_pool_first->MyDMAAddr;
-
+
eng->desc_pool_last = cur;
eng->desc_completed = eng->desc_pool_last;
-
+
// Setup work queue
INIT_WORK(&eng->irq_work, ndd_irq_worker);
-
+
// Grab IRQ line
rv = request_irq(eng->irq, ndd_irq_handler, IRQF_SHARED, KP_DRIVER_NAME_DMA_CONTROLLER, eng);
if (rv){
dev_err(&eng->pldev->dev, "setup_dma_engine: failed to request_irq: %d\n", rv);
return rv;
}
-
+
// Turn on the engine!
start_dma_engine(eng);
unlock_engine(eng);
-
+
return 0;
}
{
unsigned long timeout;
dev_dbg(&eng->pldev->dev, "Destroying DMA engine [%p]\n", eng);
-
+
// Disable the descriptor engine
WriteEngineControl(eng, 0);
-
+
// Wait for descriptor engine to finish current operaion
timeout = jiffies + (HZ / 2);
while (GetEngineControl(eng) & ENG_CTL_DMA_RUNNING){
break;
}
}
-
+
// Request a reset
WriteEngineControl(eng, ENG_CTL_DMA_RESET_REQUEST);
-
+
// Wait for reset request to be processed
timeout = jiffies + (HZ / 2);
while (GetEngineControl(eng) & (ENG_CTL_DMA_RUNNING | ENG_CTL_DMA_RESET_REQUEST)){
break;
}
}
-
+
// Request a reset
WriteEngineControl(eng, ENG_CTL_DMA_RESET);
-
+
// And wait for reset to complete
timeout = jiffies + (HZ / 2);
while (GetEngineControl(eng) & ENG_CTL_DMA_RESET){
break;
}
}
-
+
// Clear any persistent bits just to make sure there is no residue from the reset
SetClearEngineControl(eng, (ENG_CTL_IRQ_ACTIVE | ENG_CTL_DESC_COMPLETE | ENG_CTL_DESC_ALIGN_ERR | ENG_CTL_DESC_FETCH_ERR | ENG_CTL_SW_ABORT_ERR | ENG_CTL_DESC_CHAIN_END | ENG_CTL_DMA_WAITING_PERSIST), 0);
-
+
// Reset performance counters
-
+
// Completely disable the engine
WriteEngineControl(eng, 0);
}
struct kpc_dma_descriptor * cur;
dma_addr_t cur_handle;
unsigned int i;
-
+
stop_dma_engine(eng);
-
+
cur = eng->desc_pool_first;
cur_handle = eng->desc_pool_first->MyDMAAddr;
-
+
for (i = 0 ; i < eng->desc_pool_cnt ; i++){
struct kpc_dma_descriptor *next = cur->Next;
dma_addr_t next_handle = cur->DescNextDescPtr;
cur_handle = next_handle;
cur = next;
}
-
+
dma_pool_destroy(eng->desc_pool);
-
+
free_irq(eng->irq, eng);
}
u64 card_addr;
u64 dma_addr;
u64 user_ctl;
-
+
BUG_ON(priv == NULL);
ldev = priv->ldev;
BUG_ON(ldev == NULL);
-
+
dev_dbg(&priv->ldev->pldev->dev, "kpc_dma_transfer(priv = [%p], kcb = [%p], iov_base = [%p], iov_len = %ld) ldev = [%p]\n", priv, kcb, (void*)iov_base, iov_len, ldev);
-
+
acd = kzalloc(sizeof(*acd), GFP_KERNEL);
if (!acd){
dev_err(&priv->ldev->pldev->dev, "Couldn't kmalloc space for for the aio data\n");
return -ENOMEM;
}
memset(acd, 0x66, sizeof(struct aio_cb_data));
-
+
acd->priv = priv;
acd->ldev = priv->ldev;
acd->cpl = &done;
acd->kcb = kcb;
acd->len = iov_len;
acd->page_count = count_pages(iov_base, iov_len);
-
+
// Allocate an array of page pointers
acd->user_pages = kzalloc(sizeof(struct page *) * acd->page_count, GFP_KERNEL);
if (!acd->user_pages){
rv = -ENOMEM;
goto err_alloc_userpages;
}
-
+
// Lock the user buffer pages in memory, and hold on to the page pointers (for the sglist)
down_read(¤t->mm->mmap_sem); /* get memory map semaphore */
rv = get_user_pages(iov_base, acd->page_count, FOLL_TOUCH | FOLL_WRITE | FOLL_GET, acd->user_pages, NULL);
dev_err(&priv->ldev->pldev->dev, "Couldn't get_user_pages (%ld)\n", rv);
goto err_get_user_pages;
}
-
+
// Allocate and setup the sg_table (scatterlist entries)
rv = sg_alloc_table_from_pages(&acd->sgt, acd->user_pages, acd->page_count, iov_base & (PAGE_SIZE-1), iov_len, GFP_KERNEL);
if (rv){
dev_err(&priv->ldev->pldev->dev, "Couldn't alloc sg_table (%ld)\n", rv);
goto err_alloc_sg_table;
}
-
+
// Setup the DMA mapping for all the sg entries
acd->mapped_entry_count = dma_map_sg(&ldev->pldev->dev, acd->sgt.sgl, acd->sgt.nents, ldev->dir);
if (acd->mapped_entry_count <= 0){
for_each_sg(acd->sgt.sgl, sg, acd->mapped_entry_count, i){
desc_needed += count_parts_for_sge(sg);
}
-
+
lock_engine(ldev);
-
+
// Figoure out how many descriptors are available and return an error if there aren't enough
num_descrs_avail = count_descriptors_available(ldev);
dev_dbg(&priv->ldev->pldev->dev, " mapped_entry_count = %d num_descrs_needed = %d num_descrs_avail = %d\n", acd->mapped_entry_count, desc_needed, num_descrs_avail);
desc->DescByteCount = sg_dma_len(sg) - (p * 0x80000);
}
desc->DescBufferByteCount = desc->DescByteCount;
-
+
desc->DescControlFlags |= DMA_DESC_CTL_IRQONERR;
if (i == 0 && p == 0)
desc->DescControlFlags |= DMA_DESC_CTL_SOP;
if (i == acd->mapped_entry_count-1 && p == pcnt-1)
desc->DescControlFlags |= DMA_DESC_CTL_EOP | DMA_DESC_CTL_IRQONDONE;
-
+
desc->DescCardAddrLS = (card_addr & 0xFFFFFFFF);
desc->DescCardAddrMS = (card_addr >> 32) & 0xF;
card_addr += desc->DescByteCount;
-
+
dma_addr = sg_dma_address(sg) + (p * 0x80000);
desc->DescSystemAddrLS = (dma_addr & 0x00000000FFFFFFFF) >> 0;
desc->DescSystemAddrMS = (dma_addr & 0xFFFFFFFF00000000) >> 32;
-
+
user_ctl = acd->priv->user_ctl;
if (i == acd->mapped_entry_count-1 && p == pcnt-1){
user_ctl = acd->priv->user_ctl_last;
}
desc->DescUserControlLS = (user_ctl & 0x00000000FFFFFFFF) >> 0;
desc->DescUserControlMS = (user_ctl & 0xFFFFFFFF00000000) >> 32;
-
+
if (i == acd->mapped_entry_count-1 && p == pcnt-1)
desc->acd = acd;
-
+
dev_dbg(&priv->ldev->pldev->dev, " Filled descriptor %p (acd = %p)\n", desc, desc->acd);
-
+
ldev->desc_next = desc->Next;
desc = desc->Next;
}
}
-
+
// Send the filled descriptors off to the hardware to process!
SetEngineSWPtr(ldev, ldev->desc_next);
-
+
unlock_engine(ldev);
-
+
// If this is a synchronous kiocb, we need to put the calling process to sleep until the transfer is complete
if (kcb == NULL || is_sync_kiocb(kcb)){
rv = wait_for_completion_interruptible(&done);
}
return rv;
}
-
+
return -EIOCBQUEUED;
err_descr_too_many:
void transfer_complete_cb(struct aio_cb_data *acd, size_t xfr_count, u32 flags)
{
unsigned int i;
-
+
BUG_ON(acd == NULL);
BUG_ON(acd->user_pages == NULL);
BUG_ON(acd->sgt.sgl == NULL);
BUG_ON(acd->ldev == NULL);
BUG_ON(acd->ldev->pldev == NULL);
-
+
dev_dbg(&acd->ldev->pldev->dev, "transfer_complete_cb(acd = [%p])\n", acd);
-
+
for (i = 0 ; i < acd->page_count ; i++){
if (!PageReserved(acd->user_pages[i])){
set_page_dirty(acd->user_pages[i]);
}
}
-
+
dma_unmap_sg(&acd->ldev->pldev->dev, acd->sgt.sgl, acd->sgt.nents, acd->ldev->dir);
-
+
for (i = 0 ; i < acd->page_count ; i++){
put_page(acd->user_pages[i]);
}
-
+
sg_free_table(&acd->sgt);
-
+
kfree(acd->user_pages);
-
+
acd->flags = flags;
-
+
if (acd->kcb == NULL || is_sync_kiocb(acd->kcb)){
if (acd->cpl){
complete(acd->cpl);
struct kpc_dma_device *ldev = kpc_dma_lookup_device(iminor(inode));
if (ldev == NULL)
return -ENODEV;
-
+
if (! atomic_dec_and_test(&ldev->open_count)){
atomic_inc(&ldev->open_count);
return -EBUSY; /* already open */
}
-
+
priv = kzalloc(sizeof(struct dev_private_data), GFP_KERNEL);
if (!priv)
return -ENOMEM;
-
+
priv->ldev = ldev;
filp->private_data = priv;
-
+
dev_dbg(&priv->ldev->pldev->dev, "kpc_dma_open(inode = [%p], filp = [%p]) priv = [%p] ldev = [%p]\n", inode, filp, priv, priv->ldev);
return 0;
}
struct dev_private_data *priv = (struct dev_private_data *)filp->private_data;
struct kpc_dma_device *eng = priv->ldev;
dev_dbg(&priv->ldev->pldev->dev, "kpc_dma_close(inode = [%p], filp = [%p]) priv = [%p], ldev = [%p]\n", inode, filp, priv, priv->ldev);
-
+
lock_engine(eng);
-
+
stop_dma_engine(eng);
-
+
cur = eng->desc_completed->Next;
while (cur != eng->desc_next){
dev_dbg(&eng->pldev->dev, "Aborting descriptor %p (acd = %p)\n", cur, cur->acd);
if (cur->acd)
transfer_complete_cb(cur->acd, 0, ACD_FLAG_ABORT);
}
-
+
clear_desc(cur);
eng->desc_completed = cur;
-
+
cur = cur->Next;
}
-
+
start_dma_engine(eng);
-
+
unlock_engine(eng);
-
+
atomic_inc(&priv->ldev->open_count); /* release the device */
kfree(priv);
return 0;
{
struct dev_private_data *priv = (struct dev_private_data *)kcb->ki_filp->private_data;
dev_dbg(&priv->ldev->pldev->dev, "kpc_dma_aio_read(kcb = [%p], iov = [%p], iov_count = %ld, pos = %lld) priv = [%p], ldev = [%p]\n", kcb, iov, iov_count, pos, priv, priv->ldev);
-
+
if (priv->ldev->dir != DMA_FROM_DEVICE)
return -EMEDIUMTYPE;
-
+
if (iov_count != 1){
dev_err(&priv->ldev->pldev->dev, "kpc_dma_aio_read() called with iov_count > 1!\n");
return -EFAULT;
}
-
+
if (!is_sync_kiocb(kcb))
kiocb_set_cancel_fn(kcb, kpc_dma_aio_cancel);
return kpc_dma_transfer(priv, kcb, (unsigned long)iov->iov_base, iov->iov_len);
{
struct dev_private_data *priv = (struct dev_private_data *)kcb->ki_filp->private_data;
dev_dbg(&priv->ldev->pldev->dev, "kpc_dma_aio_write(kcb = [%p], iov = [%p], iov_count = %ld, pos = %lld) priv = [%p], ldev = [%p]\n", kcb, iov, iov_count, pos, priv, priv->ldev);
-
+
if (priv->ldev->dir != DMA_TO_DEVICE)
return -EMEDIUMTYPE;
-
+
if (iov_count != 1){
dev_err(&priv->ldev->pldev->dev, "kpc_dma_aio_write() called with iov_count > 1!\n");
return -EFAULT;
}
-
+
if (!is_sync_kiocb(kcb))
kiocb_set_cancel_fn(kcb, kpc_dma_aio_cancel);
return kpc_dma_transfer(priv, kcb, (unsigned long)iov->iov_base, iov->iov_len);
{
struct dev_private_data *priv = (struct dev_private_data *)filp->private_data;
dev_dbg(&priv->ldev->pldev->dev, "kpc_dma_read(filp = [%p], user_buf = [%p], count = %zu, ppos = [%p]) priv = [%p], ldev = [%p]\n", filp, user_buf, count, ppos, priv, priv->ldev);
-
+
if (priv->ldev->dir != DMA_FROM_DEVICE)
return -EMEDIUMTYPE;
-
+
return kpc_dma_transfer(priv, (struct kiocb *)NULL, (unsigned long)user_buf, count);
}
{
struct dev_private_data *priv = (struct dev_private_data *)filp->private_data;
dev_dbg(&priv->ldev->pldev->dev, "kpc_dma_write(filp = [%p], user_buf = [%p], count = %zu, ppos = [%p]) priv = [%p], ldev = [%p]\n", filp, user_buf, count, ppos, priv, priv->ldev);
-
+
if (priv->ldev->dir != DMA_TO_DEVICE)
return -EMEDIUMTYPE;
-
+
return kpc_dma_transfer(priv, (struct kiocb *)NULL, (unsigned long)user_buf, count);
}
{
struct dev_private_data *priv = (struct dev_private_data *)filp->private_data;
dev_dbg(&priv->ldev->pldev->dev, "kpc_dma_ioctl(filp = [%p], ioctl_num = 0x%x, ioctl_param = 0x%lx) priv = [%p], ldev = [%p]\n", filp, ioctl_num, ioctl_param, priv, priv->ldev);
-
+
switch (ioctl_num){
- case KND_IOCTL_SET_CARD_ADDR: priv->card_addr = ioctl_param; return priv->card_addr;
- case KND_IOCTL_SET_USER_CTL: priv->user_ctl = ioctl_param; return priv->user_ctl;
- case KND_IOCTL_SET_USER_CTL_LAST: priv->user_ctl_last = ioctl_param; return priv->user_ctl_last;
+ case KND_IOCTL_SET_CARD_ADDR: priv->card_addr = ioctl_param; return priv->card_addr;
+ case KND_IOCTL_SET_USER_CTL: priv->user_ctl = ioctl_param; return priv->user_ctl;
+ case KND_IOCTL_SET_USER_CTL_LAST: priv->user_ctl_last = ioctl_param; return priv->user_ctl_last;
case KND_IOCTL_GET_USER_STS: return priv->user_sts;
}
-
+
return -ENOTTY;
}
if (!pldev) return 0;
ldev = platform_get_drvdata(pldev);
if (!ldev) return 0;
-
- return scnprintf(buf, PAGE_SIZE,
+
+ return scnprintf(buf, PAGE_SIZE,
"EngineControlStatus = 0x%08x\n"
"RegNextDescPtr = 0x%08x\n"
"RegSWDescPtr = 0x%08x\n"
struct resource *r = NULL;
int rv = 0;
dev_t dev;
-
+
struct kpc_dma_device *ldev = kzalloc(sizeof(struct kpc_dma_device), GFP_KERNEL);
if (!ldev){
dev_err(&pldev->dev, "kpc_dma_probe: unable to kzalloc space for kpc_dma_device\n");
rv = -ENOMEM;
goto err_rv;
}
-
+
dev_dbg(&pldev->dev, "kpc_dma_probe(pldev = [%p]) ldev = [%p]\n", pldev, ldev);
-
+
INIT_LIST_HEAD(&ldev->list);
-
+
ldev->pldev = pldev;
platform_set_drvdata(pldev, ldev);
atomic_set(&ldev->open_count, 1);
-
+
mutex_init(&ldev->sem);
lock_engine(ldev);
-
+
// Get Engine regs resource
r = platform_get_resource(pldev, IORESOURCE_MEM, 0);
if (!r){
rv = -ENXIO;
goto err_kfree;
}
-
+
r = platform_get_resource(pldev, IORESOURCE_IRQ, 0);
if (!r){
dev_err(&ldev->pldev->dev, "kpc_dma_probe: didn't get the IRQ resource!\n");
goto err_kfree;
}
ldev->irq = r->start;
-
+
// Setup miscdev struct
dev = MKDEV(assigned_major_num, pldev->id);
ldev->kpc_dma_dev = device_create(kpc_dma_class, &pldev->dev, dev, ldev, "kpc_dma%d", pldev->id);
dev_err(&ldev->pldev->dev, "kpc_dma_probe: device_create failed: %d\n", rv);
goto err_kfree;
}
-
+
// Setup the DMA engine
rv = setup_dma_engine(ldev, 30);
if (rv){
dev_err(&ldev->pldev->dev, "kpc_dma_probe: failed to setup_dma_engine: %d\n", rv);
goto err_misc_dereg;
}
-
+
// Setup the sysfs files
rv = sysfs_create_files(&(ldev->pldev->dev.kobj), ndd_attr_list);
if (rv){
dev_err(&ldev->pldev->dev, "kpc_dma_probe: Failed to add sysfs files: %d\n", rv);
goto err_destroy_eng;
}
-
+
kpc_dma_add_device(ldev);
-
+
return 0;
-
+
err_destroy_eng:
destroy_dma_engine(ldev);
err_misc_dereg:
struct kpc_dma_device *ldev = platform_get_drvdata(pldev);
if (!ldev)
return -ENXIO;
-
+
dev_dbg(&ldev->pldev->dev, "kpc_dma_remove(pldev = [%p]) ldev = [%p]\n", pldev, ldev);
-
+
lock_engine(ldev);
sysfs_remove_files(&(ldev->pldev->dev.kobj), ndd_attr_list);
destroy_dma_engine(ldev);
kpc_dma_del_device(ldev);
device_destroy(kpc_dma_class, MKDEV(assigned_major_num, ldev->pldev->id));
kfree(ldev);
-
+
return 0;
}
int __init kpc_dma_driver_init(void)
{
int err;
-
+
err = __register_chrdev(KPC_DMA_CHAR_MAJOR, 0, KPC_DMA_NUM_MINORS, "kpc_dma", &kpc_dma_fops);
if (err < 0){
pr_err("Can't allocate a major number (%d) for kpc_dma (err = %d)\n", KPC_DMA_CHAR_MAJOR, err);
goto fail_chrdev_register;
}
assigned_major_num = err;
-
+
kpc_dma_class = class_create(THIS_MODULE, "kpc_dma");
err = PTR_ERR(kpc_dma_class);
if (IS_ERR(kpc_dma_class)){
pr_err("Can't create class kpc_dma (err = %d)\n", err);
goto fail_class_create;
}
-
+
err = platform_driver_register(&kpc_dma_plat_driver_i);
if (err){
pr_err("Can't register platform driver for kpc_dma (err = %d)\n", err);
goto fail_platdriver_register;
}
-
+
return err;
-
+
fail_platdriver_register:
class_destroy(kpc_dma_class);
fail_class_create:
struct device *kpc_dma_dev;
struct kobject kobj;
char name[16];
-
+
int dir; // DMA_FROM_DEVICE || DMA_TO_DEVICE
struct mutex sem;
unsigned int irq;
struct work_struct irq_work;
-
+
atomic_t open_count;
-
+
size_t accumulated_bytes;
u32 accumulated_flags;
-
+
// Descriptor "Pool" housekeeping
u32 desc_pool_cnt;
struct dma_pool *desc_pool;
struct kpc_dma_descriptor *desc_pool_first;
struct kpc_dma_descriptor *desc_pool_last;
-
+
struct kpc_dma_descriptor *desc_next;
struct kpc_dma_descriptor *desc_completed;
};
unsigned char flags;
struct kiocb *kcb;
size_t len;
-
+
unsigned int page_count;
struct page **user_pages;
struct sg_table sgt;
volatile u32 DescSystemAddrLS;
volatile u32 DescSystemAddrMS;
volatile u32 DescNextDescPtr;
-
+
dma_addr_t MyDMAAddr;
struct kpc_dma_descriptor *Next;
-
+
struct aio_cb_data *acd;
} __attribute__((packed));
// DescControlFlags:
projects / platform / kernel / linux-rpi.git / commitdiff