ge2d: merge ge2d from amlogic-3.14-dev [1/1]
authorJian Cao <jian.cao@amlogic.com>
Fri, 25 Jan 2019 08:40:51 +0000 (16:40 +0800)
committerNick Xie <nick@khadas.com>
Mon, 5 Aug 2019 07:11:17 +0000 (15:11 +0800)
PD#SWPL-4355

Problem:
ge2d: fix ge2d bitblt error

Solution:
merge patch 'fix ge2d bitblt error' from amlogic-3.14-dev(PD#154877)

Verify:
verified on u200

Change-Id: I4a813810837814931c3cb68f9a0f8a0929b06540
Signed-off-by: pengcheng chen <pengcheng.chen@amlogic.com>
Signed-off-by: Jian Cao <jian.cao@amlogic.com>
ge2d: merge ge2d from amlogic-3.14-dev  [2/3]

PD#SWPL-4355

Problem:
ge2d: play video display mess when used ionvideo

Solution:
merge patch 'play video display mess when used ionvideo'
from amlogic-3.14-dev(PD#155143)

Verify:
verified on u200

Change-Id: Iaf34fe1d1c7e7637015dadaaf43e201cf28089b7
Signed-off-by: pengcheng chen <pengcheng.chen@amlogic.com>
Signed-off-by: Jian Cao <jian.cao@amlogic.com>
ge2d: merge ge2d from amlogic-3.14-dev  [3/3]

PD#SWPL-4355

Problem:
ge2d: Adjust scaler para when input is nv21 and output is rgb

Solution:
merge patch 'Adjust scaler para when input is nv21 and output is rgb'
from amlogic-3.14-dev(PD#15652)

Verify:
verified on u200

Change-Id: I199b07d683a01175ec17d4d34be6febd3083920c
Signed-off-by: pengcheng chen <pengcheng.chen@amlogic.com>
Signed-off-by: Jian Cao <jian.cao@amlogic.com>
drivers/amlogic/media/common/ge2d/ge2d_hw.c
drivers/amlogic/media/common/ge2d/ge2d_wq.c
include/linux/amlogic/media/ge2d/ge2d.h

index 1634870..406bcbd 100644 (file)
@@ -814,6 +814,32 @@ void ge2d_set_cmd(struct ge2d_cmd_s *cfg)
        x_yc_ratio = ge2d_reg_get_bits(GE2D_GEN_CTRL0, 11, 1);
        y_yc_ratio = ge2d_reg_get_bits(GE2D_GEN_CTRL0, 10, 1);
 
+       /* src:yuv , dst: rgb */
+       if ((cfg->src1_fmt & GE2D_FORMAT_YUV) &&
+               ((cfg->dst_fmt & GE2D_FORMAT_YUV) == 0)) {
+               if (x_yc_ratio) {
+                       if ((cfg->src1_x_rev + cfg->dst_x_rev) == 1) {
+                               x_extra_bit_start = 3;
+                               x_extra_bit_end   = 2;
+                               x_chr_phase = 0x4c;
+                       } else {
+                               x_extra_bit_start = 2;
+                               x_extra_bit_end   = 3;
+                               x_chr_phase = 0xc4;
+                       }
+               }
+               if (y_yc_ratio) {
+                       if ((cfg->src1_y_rev + cfg->dst_y_rev) == 1) {
+                               y_extra_bit_start = 3;
+                               y_extra_bit_end   = 2;
+                               y_chr_phase = 0x4c;
+                       } else {
+                               y_extra_bit_start = 2;
+                               y_extra_bit_end   = 3;
+                               y_chr_phase = 0xc4;
+                       }
+               }
+       } else {
                if (x_yc_ratio) {
                        if ((cfg->src1_x_rev + cfg->dst_x_rev) == 1) {
                                x_extra_bit_start = 3;
@@ -836,8 +862,8 @@ void ge2d_set_cmd(struct ge2d_cmd_s *cfg)
                                y_extra_bit_end   = 3;
                                y_chr_phase = 0x4c;
                        }
+               }
        }
-
        ge2d_reg_write(GE2D_SRC1_X_START_END,
                        (x_extra_bit_start << 30) |  /* x start extra */
                        ((cfg->src1_x_start & 0x3fff) << 16) |
@@ -917,20 +943,18 @@ void ge2d_set_cmd(struct ge2d_cmd_s *cfg)
        if (!gaul_filter_used) {
                rate_w = (widtho * 10) / widthi;
                rate_h = (heighto * 10) / heighti;
-               if (rate_w == 10) {
+               if (rate_h == 10) {
                        /* not scaler case */
-                       cfg->sc_vsc_en = 1;
-                       cfg->vsc_rpt_l0_num = 1;
                        cfg->vsc_ini_phase = 0;
                        ge2d_reg_set_bits(GE2D_SC_MISC_CTRL,
                                ((0 << 1) | (0 << 0)), 8, 2);
-               } else if (rate_w < 10) {
+               } else if (rate_h < 10) {
                        /* scaler down case */
                        cfg->sc_vsc_en = 1;
                        cfg->vsc_rpt_l0_num = 1;
-                       if (rate_w != 0)
+                       if (rate_h != 0)
                                cfg->vsc_ini_phase =
-                                       0x5000000/rate_w - 0x800000;
+                                       0x5000000/rate_h - 0x800000;
                        else
                                cfg->vsc_ini_phase = 0x5000000;
                } else {
@@ -938,23 +962,21 @@ void ge2d_set_cmd(struct ge2d_cmd_s *cfg)
                        cfg->sc_vsc_en = 1;
                        cfg->vsc_rpt_l0_num = 2;
                        cfg->vsc_ini_phase =
-                               0x800000 + 0x5000000/rate_w;
+                               0x800000 + 0x5000000/rate_h;
                }
 
-               if (rate_h == 10) {
+               if (rate_w == 10) {
                        /* not scaler case */
-                       cfg->sc_hsc_en = 1;
-                       cfg->hsc_rpt_p0_num = 1;
                        cfg->hsc_ini_phase = 0;
                        ge2d_reg_set_bits(GE2D_SC_MISC_CTRL,
                                ((0 << 1) | (0 << 0)), 8, 2);
-               } else if (rate_h < 10) {
+               } else if (rate_w < 10) {
                        /* scaler down case */
                        cfg->sc_hsc_en = 1;
                        cfg->hsc_rpt_p0_num = 1;
-                       if (rate_h != 0)
+                       if (rate_w != 0)
                                cfg->hsc_ini_phase =
-                                       0x5000000/rate_h - 0x800000;
+                                       0x5000000/rate_w - 0x800000;
                        else
                                cfg->hsc_ini_phase = 0x5000000;
                } else {
@@ -962,7 +984,7 @@ void ge2d_set_cmd(struct ge2d_cmd_s *cfg)
                        cfg->sc_hsc_en = 1;
                        cfg->hsc_rpt_p0_num = 2;
                        cfg->hsc_ini_phase =
-                               0x800000 + 0x5000000/rate_h;
+                               0x800000 + 0x5000000/rate_w;
                }
                /* expand src1/src2 color with 1 */
                ge2d_reg_set_bits(GE2D_GEN_CTRL2, 1, 27, 1);
index 3c9bf86..ae4816d 100644 (file)
@@ -1982,6 +1982,11 @@ int ge2d_context_config_ex_ion(struct ge2d_context_s *context,
        ge2d_cmd_cfg->hsc_rpt_p0_num = ge2d_config->hf_rpt_num;
        ge2d_cmd_cfg->src1_cmult_asel = ge2d_config->src1_cmult_asel;
        ge2d_cmd_cfg->src2_cmult_asel = ge2d_config->src2_cmult_asel;
+
+       ge2d_cmd_cfg->src1_fmt = ge2d_config->src_para.format;
+       ge2d_cmd_cfg->src2_fmt = ge2d_config->src2_para.format;
+       ge2d_cmd_cfg->dst_fmt = ge2d_config->dst_para.format;
+
        context->config.update_flag = UPDATE_ALL;
        /* context->config.src1_data.ddr_burst_size_y = 3; */
        /* context->config.src1_data.ddr_burst_size_cb = 3; */
index af2f0fc..92e541e 100644 (file)
@@ -555,6 +555,7 @@ struct ge2d_cmd_s {
        /* unsigned char    src1_x_chr_phase; */
        /* unsigned char    src1_y_chr_phase; */
        unsigned char    src1_fill_color_en;
+       unsigned int     src1_fmt;
 
        int              src2_x_start;
        int              src2_y_start;
@@ -563,6 +564,7 @@ struct ge2d_cmd_s {
        unsigned char    src2_x_rev;
        unsigned char    src2_y_rev;
        unsigned char    src2_fill_color_en;
+       unsigned int     src2_fmt;
 
        int              dst_x_start;
        int              dst_y_start;
@@ -571,6 +573,7 @@ struct ge2d_cmd_s {
        unsigned char    dst_xy_swap;
        unsigned char    dst_x_rev;
        unsigned char    dst_y_rev;
+       unsigned int     dst_fmt;
 
        int              sc_prehsc_en;
        int              sc_prevsc_en;