PCI: dwc: Disable outbound windows only for controllers using iATU

[ Upstream commit d60a2e281e9de2b2f67343b2e39417ca0f4fd54e ]

Some DWC-based controllers (e.g., pcie-al.c and pci-keystone.c, identified
by the fact that they override the default dw_child_pcie_ops) use their own
address translation approach instead of the DWC internal ATU (iATU).  For
those controllers, skip disabling the iATU outbound windows.

[bhelgaas: commit log, update multiple window comment]
Fixes: 458ad06c4cdd ("PCI: dwc: Ensure all outbound ATU windows are reset")
Link: https://lore.kernel.org/r/20220624143428.8334-4-Sergey.Semin@baikalelectronics.ru
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index 3200e90..7cd4593 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -536,7 +536,6 @@ static struct pci_ops dw_pcie_ops = {
 
 void dw_pcie_setup_rc(struct pcie_port *pp)
 {
-       int i;
        u32 val, ctrl, num_ctrls;
        struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
 
@@ -588,19 +587,22 @@ void dw_pcie_setup_rc(struct pcie_port *pp)
                PCI_COMMAND_MASTER | PCI_COMMAND_SERR;
        dw_pcie_writel_dbi(pci, PCI_COMMAND, val);
 
-       /* Ensure all outbound windows are disabled so there are multiple matches */
-       for (i = 0; i < pci->num_ob_windows; i++)
-               dw_pcie_disable_atu(pci, i, DW_PCIE_REGION_OUTBOUND);
-
        /*
         * If the platform provides its own child bus config accesses, it means
         * the platform uses its own address translation component rather than
         * ATU, so we should not program the ATU here.
         */
        if (pp->bridge->child_ops == &dw_child_pcie_ops) {
-               int atu_idx = 0;
+               int i, atu_idx = 0;
                struct resource_entry *entry;
 
+               /*
+                * Disable all outbound windows to make sure a transaction
+                * can't match multiple windows.
+                */
+               for (i = 0; i < pci->num_ob_windows; i++)
+                       dw_pcie_disable_atu(pci, i, DW_PCIE_REGION_OUTBOUND);
+
                /* Get last memory resource entry */
                resource_list_for_each_entry(entry, &pp->bridge->windows) {
                        if (resource_type(entry->res) != IORESOURCE_MEM)