dt-bindings: phy: rename phy-rockchip-inno-usb2.yaml

Rename phy-rockchip-inno-usb2.yaml to a more common format of
rockchip,inno-usb2phy.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Acked-By: Vinod Koul <vkoul@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/99794484-d67e-ee1f-4e76-200de20a879c@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
deleted file mode 100644 (file)
index f719200..0000000
--- a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
+++ /dev/null
@@ -1,188 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/phy/phy-rockchip-inno-usb2.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Rockchip USB2.0 phy with inno IP block
-
-maintainers:
-  - Heiko Stuebner <heiko@sntech.de>
-
-properties:
-  compatible:
-    enum:
-      - rockchip,px30-usb2phy
-      - rockchip,rk3128-usb2phy
-      - rockchip,rk3228-usb2phy
-      - rockchip,rk3308-usb2phy
-      - rockchip,rk3328-usb2phy
-      - rockchip,rk3366-usb2phy
-      - rockchip,rk3399-usb2phy
-      - rockchip,rk3568-usb2phy
-      - rockchip,rv1108-usb2phy
-
-  reg:
-    maxItems: 1
-
-  clock-output-names:
-    description:
-      The usb 480m output clock name.
-
-  "#clock-cells":
-    const: 0
-
-  clocks:
-    maxItems: 1
-
-  clock-names:
-    const: phyclk
-
-  assigned-clocks:
-    description:
-      Phandle of the usb 480m clock.
-
-  assigned-clock-parents:
-    description:
-      Parent of the usb 480m clock.
-      Select between usb-phy output 480m and xin24m.
-      Refer to clk/clock-bindings.txt for generic clock consumer properties.
-
-  extcon:
-    description:
-      Phandle to the extcon device providing the cable state for the otg phy.
-
-  interrupts:
-    description: Muxed interrupt for both ports
-    maxItems: 1
-
-  rockchip,usbgrf:
-    $ref: /schemas/types.yaml#/definitions/phandle
-    description:
-      Phandle to the syscon managing the 'usb general register files'.
-      When set the driver will request its phandle as one companion-grf
-      for some special SoCs (e.g rv1108).
-
-  host-port:
-    type: object
-    additionalProperties: false
-
-    properties:
-      "#phy-cells":
-        const: 0
-
-      interrupts:
-        description: host linestate interrupt
-        maxItems: 1
-
-      interrupt-names:
-        const: linestate
-
-      phy-supply:
-        description:
-          Phandle to a regulator that provides power to VBUS.
-          See ./phy-bindings.txt for details.
-
-    required:
-      - "#phy-cells"
-
-  otg-port:
-    type: object
-    additionalProperties: false
-
-    properties:
-      "#phy-cells":
-        const: 0
-
-      interrupts:
-        minItems: 1
-        maxItems: 3
-
-      interrupt-names:
-        oneOf:
-          - const: linestate
-          - const: otg-mux
-          - items:
-              - const: otg-bvalid
-              - const: otg-id
-              - const: linestate
-
-      phy-supply:
-        description:
-          Phandle to a regulator that provides power to VBUS.
-          See ./phy-bindings.txt for details.
-
-    required:
-      - "#phy-cells"
-
-required:
-  - compatible
-  - reg
-  - clock-output-names
-  - "#clock-cells"
-  - host-port
-  - otg-port
-
-allOf:
-  - if:
-      properties:
-        compatible:
-          contains:
-            const: rockchip,rk3568-usb2phy
-
-    then:
-      properties:
-        host-port:
-          properties:
-            interrupts: false
-
-        otg-port:
-          properties:
-            interrupts: false
-
-      required:
-        - interrupts
-
-    else:
-      properties:
-        interrupts: false
-
-        host-port:
-          required:
-            - interrupts
-            - interrupt-names
-
-        otg-port:
-          required:
-            - interrupts
-            - interrupt-names
-
-additionalProperties: false
-
-examples:
-  - |
-    #include <dt-bindings/clock/rk3399-cru.h>
-    #include <dt-bindings/interrupt-controller/arm-gic.h>
-    #include <dt-bindings/interrupt-controller/irq.h>
-    u2phy0: usb2phy@e450 {
-      compatible = "rockchip,rk3399-usb2phy";
-      reg = <0xe450 0x10>;
-      clocks = <&cru SCLK_USB2PHY0_REF>;
-      clock-names = "phyclk";
-      clock-output-names = "clk_usbphy0_480m";
-      #clock-cells = <0>;
-
-      u2phy0_host: host-port {
-        interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
-        interrupt-names = "linestate";
-        #phy-cells = <0>;
-      };
-
-      u2phy0_otg: otg-port {
-        interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
-                     <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
-                     <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
-        interrupt-names = "otg-bvalid", "otg-id", "linestate";
-        #phy-cells = <0>;
-      };
-    };

diff --git a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
new file mode 100644 (file)
index 0000000..0d6b8c2
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml
@@ -0,0 +1,188 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/rockchip,inno-usb2phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip USB2.0 phy with inno IP block
+
+maintainers:
+  - Heiko Stuebner <heiko@sntech.de>
+
+properties:
+  compatible:
+    enum:
+      - rockchip,px30-usb2phy
+      - rockchip,rk3128-usb2phy
+      - rockchip,rk3228-usb2phy
+      - rockchip,rk3308-usb2phy
+      - rockchip,rk3328-usb2phy
+      - rockchip,rk3366-usb2phy
+      - rockchip,rk3399-usb2phy
+      - rockchip,rk3568-usb2phy
+      - rockchip,rv1108-usb2phy
+
+  reg:
+    maxItems: 1
+
+  clock-output-names:
+    description:
+      The usb 480m output clock name.
+
+  "#clock-cells":
+    const: 0
+
+  clocks:
+    maxItems: 1
+
+  clock-names:
+    const: phyclk
+
+  assigned-clocks:
+    description:
+      Phandle of the usb 480m clock.
+
+  assigned-clock-parents:
+    description:
+      Parent of the usb 480m clock.
+      Select between usb-phy output 480m and xin24m.
+      Refer to clk/clock-bindings.txt for generic clock consumer properties.
+
+  extcon:
+    description:
+      Phandle to the extcon device providing the cable state for the otg phy.
+
+  interrupts:
+    description: Muxed interrupt for both ports
+    maxItems: 1
+
+  rockchip,usbgrf:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      Phandle to the syscon managing the 'usb general register files'.
+      When set the driver will request its phandle as one companion-grf
+      for some special SoCs (e.g rv1108).
+
+  host-port:
+    type: object
+    additionalProperties: false
+
+    properties:
+      "#phy-cells":
+        const: 0
+
+      interrupts:
+        description: host linestate interrupt
+        maxItems: 1
+
+      interrupt-names:
+        const: linestate
+
+      phy-supply:
+        description:
+          Phandle to a regulator that provides power to VBUS.
+          See ./phy-bindings.txt for details.
+
+    required:
+      - "#phy-cells"
+
+  otg-port:
+    type: object
+    additionalProperties: false
+
+    properties:
+      "#phy-cells":
+        const: 0
+
+      interrupts:
+        minItems: 1
+        maxItems: 3
+
+      interrupt-names:
+        oneOf:
+          - const: linestate
+          - const: otg-mux
+          - items:
+              - const: otg-bvalid
+              - const: otg-id
+              - const: linestate
+
+      phy-supply:
+        description:
+          Phandle to a regulator that provides power to VBUS.
+          See ./phy-bindings.txt for details.
+
+    required:
+      - "#phy-cells"
+
+required:
+  - compatible
+  - reg
+  - clock-output-names
+  - "#clock-cells"
+  - host-port
+  - otg-port
+
+allOf:
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: rockchip,rk3568-usb2phy
+
+    then:
+      properties:
+        host-port:
+          properties:
+            interrupts: false
+
+        otg-port:
+          properties:
+            interrupts: false
+
+      required:
+        - interrupts
+
+    else:
+      properties:
+        interrupts: false
+
+        host-port:
+          required:
+            - interrupts
+            - interrupt-names
+
+        otg-port:
+          required:
+            - interrupts
+            - interrupt-names
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/rk3399-cru.h>
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/interrupt-controller/irq.h>
+    u2phy0: usb2phy@e450 {
+      compatible = "rockchip,rk3399-usb2phy";
+      reg = <0xe450 0x10>;
+      clocks = <&cru SCLK_USB2PHY0_REF>;
+      clock-names = "phyclk";
+      clock-output-names = "clk_usbphy0_480m";
+      #clock-cells = <0>;
+
+      u2phy0_host: host-port {
+        interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
+        interrupt-names = "linestate";
+        #phy-cells = <0>;
+      };
+
+      u2phy0_otg: otg-port {
+        interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
+                     <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
+                     <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
+        interrupt-names = "otg-bvalid", "otg-id", "linestate";
+        #phy-cells = <0>;
+      };
+    };

diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
index 16d2eae0b8444deed4e87f04f8e7ff89382cc8c7..5c26a0c24ba50592b8037004d806f9170d8f2514 100644 (file)
--- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
@@ -201,7 +201,7 @@ allOf:
         "usb2phy@[0-9a-f]+$":
           type: object
 
-          $ref: "/schemas/phy/phy-rockchip-inno-usb2.yaml#"
+          $ref: /schemas/phy/rockchip,inno-usb2phy.yaml#
 
           unevaluatedProperties: false