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pre-RA-sched debug-only fix
author
Andrew Trick
<atrick@apple.com>
Thu, 7 Mar 2013 19:21:08 +0000
(19:21 +0000)
committer
Andrew Trick
<atrick@apple.com>
Thu, 7 Mar 2013 19:21:08 +0000
(19:21 +0000)
llvm-svn: 176638
llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
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diff --git
a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
index
f843584
..
c009cfc
100644
(file)
--- a/
llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
+++ b/
llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
@@
-1360,8
+1360,10
@@
SUnit *ScheduleDAGRRList::PickNodeToScheduleBottomUp() {
SmallVector<unsigned, 4> LRegs;
if (!DelayForLiveRegsBottomUp(CurSU, LRegs))
break;
- DEBUG(dbgs() << " Interfering reg " << TRI->getName(LRegs[0])
- << " SU #" << CurSU->NodeNum << '\n');
+ DEBUG(dbgs() << " Interfering reg " <<
+ (LRegs[0] == TRI->getNumRegs() ? "CallResource"
+ : TRI->getName(LRegs[0]))
+ << " SU #" << CurSU->NodeNum << '\n');
std::pair<LRegsMapT::iterator, bool> LRegsPair =
LRegsMap.insert(std::make_pair(CurSU, LRegs));
if (LRegsPair.second) {