uint32_t scope2 = reinterpret_cast<uint32_t>(pc_) & ~kImm28Mask;
if (scope1 != scope2) {
- Assembler::JumpLabelToJumpRegister(pc_);
+ Assembler::JumpToJumpRegister(pc_);
}
}
if (IsInternalReference(rmode_) || IsInternalReferenceEncoded(rmode_)) {
}
}
// Check we have a branch or jump instruction.
- DCHECK(IsBranch(instr) || IsJ(instr) || IsLui(instr));
+ DCHECK(IsBranch(instr) || IsLui(instr));
// Do NOT change this to <<2. We rely on arithmetic shifts here, assuming
// the compiler uses arithmectic shifts for signed integers.
if (IsBranch(instr)) {
return pos - delta;
}
} else {
- int32_t imm28 = (instr & static_cast<int32_t>(kImm26Mask)) << 2;
- if (imm28 == kEndOfJumpChain) {
- // EndOfChain sentinel is returned directly, not relative to pc or pos.
- return kEndOfChain;
- } else {
- uint32_t instr_address = reinterpret_cast<int32_t>(buffer_ + pos);
- instr_address &= kImm28Mask;
- int delta = static_cast<int>(instr_address - imm28);
- DCHECK(pos > delta);
- return pos - delta;
- }
+ UNREACHABLE();
+ return 0;
}
}
return;
}
- DCHECK(IsBranch(instr) || IsJ(instr) || IsLui(instr));
+ DCHECK(IsBranch(instr) || IsLui(instr));
if (IsBranch(instr)) {
int32_t imm18 = target_pos - (pos + kBranchPCOffset);
DCHECK((imm18 & 3) == 0);
instr_at_put(pos + 1 * Assembler::kInstrSize,
instr_ori | (imm & kImm16Mask));
} else {
- uint32_t imm28 = reinterpret_cast<uint32_t>(buffer_) + target_pos;
- imm28 &= kImm28Mask;
- DCHECK((imm28 & 3) == 0);
-
- instr &= ~kImm26Mask;
- uint32_t imm26 = imm28 >> 2;
- DCHECK(is_uint26(imm26));
-
- instr_at_put(pos, instr | (imm26 & kImm26Mask));
+ UNREACHABLE();
}
}
instr_at_put(pc + 1 * Assembler::kInstrSize,
instr_ori | (imm & kImm16Mask));
return 2; // Number of instructions patched.
- } else if (IsJ(instr)) {
- uint32_t imm28 = (instr & static_cast<int32_t>(kImm26Mask)) << 2;
- if (static_cast<int32_t>(imm28) == kEndOfJumpChain) {
- return 0; // Number of instructions patched.
- }
- imm28 += pc_delta;
- imm28 &= kImm28Mask;
- DCHECK((imm28 & 3) == 0);
-
- instr &= ~kImm26Mask;
- uint32_t imm26 = imm28 >> 2;
- DCHECK(is_uint26(imm26));
-
- instr_at_put(pc, instr | (imm26 & kImm26Mask));
- return 1; // Number of instructions patched.
} else {
UNREACHABLE();
return 0;
}
-void Assembler::JumpLabelToJumpRegister(Address pc) {
+void Assembler::JumpToJumpRegister(Address pc) {
// Address pc points to lui/ori instructions.
// Jump to label may follow at pc + 2 * kInstrSize.
uint32_t* p = reinterpret_cast<uint32_t*>(pc);
// Return the code target address of the patch debug break slot
inline static Address break_address_from_return_address(Address pc);
- static void JumpLabelToJumpRegister(Address pc);
+ static void JumpToJumpRegister(Address pc);
static void QuietNaN(HeapObject* nan);
}
-void MacroAssembler::J(Label* L, BranchDelaySlot bdslot) {
- BlockTrampolinePoolScope block_trampoline_pool(this);
-
- uint32_t imm28;
- imm28 = jump_address(L);
- imm28 &= kImm28Mask;
- { BlockGrowBufferScope block_buf_growth(this);
- // Buffer growth (and relocation) must be blocked for internal references
- // until associated instructions are emitted and available to be patched.
- RecordRelocInfo(RelocInfo::INTERNAL_REFERENCE_ENCODED);
- j(imm28);
- }
- // Emit a nop in the branch delay slot if required.
- if (bdslot == PROTECT)
- nop();
-}
-
-
void MacroAssembler::Jr(Label* L, BranchDelaySlot bdslot) {
BlockTrampolinePoolScope block_trampoline_pool(this);
void BranchAndLinkShort(Label* L, Condition cond, Register rs,
const Operand& rt,
BranchDelaySlot bdslot = PROTECT);
- void J(Label* L, BranchDelaySlot bdslot);
void Jr(Label* L, BranchDelaySlot bdslot);
void Jalr(Label* L, BranchDelaySlot bdslot);
}
}
// Check we have a branch or jump instruction.
- DCHECK(IsBranch(instr) || IsJ(instr) || IsLui(instr));
+ DCHECK(IsBranch(instr) || IsLui(instr));
// Do NOT change this to <<2. We rely on arithmetic shifts here, assuming
// the compiler uses arithmetic shifts for signed integers.
if (IsBranch(instr)) {
return pos - delta;
}
} else {
- int32_t imm28 = (instr & static_cast<int32_t>(kImm26Mask)) << 2;
- if (imm28 == kEndOfJumpChain) {
- // EndOfChain sentinel is returned directly, not relative to pc or pos.
- return kEndOfChain;
- } else {
- uint64_t instr_address = reinterpret_cast<int64_t>(buffer_ + pos);
- instr_address &= kImm28Mask;
- int delta = static_cast<int>(instr_address - imm28);
- DCHECK(pos > delta);
- return pos - delta;
- }
+ UNREACHABLE();
+ return 0;
}
}
return;
}
- DCHECK(IsBranch(instr) || IsJ(instr) || IsLui(instr));
+ DCHECK(IsBranch(instr) || IsLui(instr));
if (IsBranch(instr)) {
int32_t imm18 = target_pos - (pos + kBranchPCOffset);
DCHECK((imm18 & 3) == 0);
instr_at_put(pos + 3 * Assembler::kInstrSize,
instr_ori2 | (imm & kImm16Mask));
} else {
- uint64_t imm28 = reinterpret_cast<uint64_t>(buffer_) + target_pos;
- imm28 &= kImm28Mask;
- DCHECK((imm28 & 3) == 0);
-
- instr &= ~kImm26Mask;
- uint32_t imm26 = imm28 >> 2;
- DCHECK(is_uint26(imm26));
-
- instr_at_put(pos, instr | (imm26 & kImm26Mask));
+ UNREACHABLE();
}
}
}
Instr instr = instr_at(pc);
DCHECK(RelocInfo::IsInternalReferenceEncoded(rmode));
- DCHECK(IsJ(instr) || IsLui(instr));
if (IsLui(instr)) {
Instr instr_lui = instr_at(pc + 0 * Assembler::kInstrSize);
Instr instr_ori = instr_at(pc + 1 * Assembler::kInstrSize);
instr_ori2 | (imm & kImm16Mask));
return 4; // Number of instructions patched.
} else {
- uint32_t imm28 = (instr & static_cast<int32_t>(kImm26Mask)) << 2;
- if (static_cast<int32_t>(imm28) == kEndOfJumpChain) {
- return 0; // Number of instructions patched.
- }
-
- imm28 += pc_delta;
- imm28 &= kImm28Mask;
- DCHECK((imm28 & 3) == 0);
-
- instr &= ~kImm26Mask;
- uint32_t imm26 = imm28 >> 2;
- DCHECK(is_uint26(imm26));
-
- instr_at_put(pc, instr | (imm26 & kImm26Mask));
- return 1; // Number of instructions patched.
+ UNREACHABLE();
+ return 0; // Number of instructions patched.
}
}
}
-void Assembler::JumpLabelToJumpRegister(Address pc) {
- // Address pc points to lui/ori instructions.
- // Jump to label may follow at pc + 2 * kInstrSize.
- uint32_t* p = reinterpret_cast<uint32_t*>(pc);
-#ifdef DEBUG
- Instr instr1 = instr_at(pc);
-#endif
- Instr instr2 = instr_at(pc + 1 * kInstrSize);
- Instr instr3 = instr_at(pc + 6 * kInstrSize);
- bool patched = false;
-
- if (IsJal(instr3)) {
- DCHECK(GetOpcodeField(instr1) == LUI);
- DCHECK(GetOpcodeField(instr2) == ORI);
-
- uint32_t rs_field = GetRt(instr2) << kRsShift;
- uint32_t rd_field = ra.code() << kRdShift; // Return-address (ra) reg.
- *(p+6) = SPECIAL | rs_field | rd_field | JALR;
- patched = true;
- } else if (IsJ(instr3)) {
- DCHECK(GetOpcodeField(instr1) == LUI);
- DCHECK(GetOpcodeField(instr2) == ORI);
-
- uint32_t rs_field = GetRt(instr2) << kRsShift;
- *(p+6) = SPECIAL | rs_field | JR;
- patched = true;
- }
-
- if (patched) {
- CpuFeatures::FlushICache(pc+6, sizeof(int32_t));
- }
-}
-
-
Handle<ConstantPoolArray> Assembler::NewConstantPool(Isolate* isolate) {
// No out-of-line constant pool support.
DCHECK(!FLAG_enable_ool_constant_pool);
// Return the code target address of the patch debug break slot
inline static Address break_address_from_return_address(Address pc);
- static void JumpLabelToJumpRegister(Address pc);
-
static void QuietNaN(HeapObject* nan);
// This sets the branch destination (which gets loaded at the call address).
}
-void MacroAssembler::J(Label* L, BranchDelaySlot bdslot) {
- BlockTrampolinePoolScope block_trampoline_pool(this);
-
- uint64_t imm28;
- imm28 = jump_address(L);
- imm28 &= kImm28Mask;
- { BlockGrowBufferScope block_buf_growth(this);
- // Buffer growth (and relocation) must be blocked for internal references
- // until associated instructions are emitted and available to be patched.
- RecordRelocInfo(RelocInfo::INTERNAL_REFERENCE_ENCODED);
- j(imm28);
- }
- // Emit a nop in the branch delay slot if required.
- if (bdslot == PROTECT)
- nop();
-}
-
-
void MacroAssembler::Jr(Label* L, BranchDelaySlot bdslot) {
BlockTrampolinePoolScope block_trampoline_pool(this);
void BranchAndLinkShort(Label* L, Condition cond, Register rs,
const Operand& rt,
BranchDelaySlot bdslot = PROTECT);
- void J(Label* L, BranchDelaySlot bdslot);
void Jr(Label* L, BranchDelaySlot bdslot);
void Jalr(Label* L, BranchDelaySlot bdslot);