NV_WRITE(NV_PFIFO_CACH0_PUL0, 0x00000000);
NV_WRITE(NV_PFIFO_SIZE , 0x0000FFFF);
NV_WRITE(NV_PFIFO_CACH1_HASH, 0x0000FFFF);
+ NV_WRITE(NV_PFIFO_RAMHT,
+ (0x03 << 24) /* search 128 */ |
+ ((dev_priv->objs.ht_bits - 9) << 16) |
+ (dev_priv->objs.ht_base >> 8)
+ );
+ NV_WRITE(NV_PFIFO_RAMFC, 0x00000110); /* RAMIN+0x11000 0.5k */
+ NV_WRITE(NV_PFIFO_RAMRO, 0x00000112); /* RAMIN+0x11200 0.5k */
NV_WRITE(NV_PFIFO_CACH0_PUL1, 0x00000001);
NV_WRITE(NV_PFIFO_CACH1_DMAC, 0x00000000);
NV_WRITE(NV_PFIFO_CACH1_ENG, 0x00000000);
obj->instance >>= (dev_priv->card_type >=NV_40 ? 5 : 4);
be = obj->instance / 32;
bb = obj->instance % 32;
- objs->inst_bmap[be] &= ~bb;
+ objs->inst_bmap[be] &= ~(1<<bb);
objs->free_instance++;
}
dev_priv->objs.ht_base = 0x10000;
dev_priv->objs.ht_size = (1 << dev_priv->objs.ht_bits);
- NV_WRITE(NV_PFIFO_RAMHT,
- (0x03 << 24) /* search 128 */ |
- ((dev_priv->objs.ht_bits - 9) << 16) |
- ((dev_priv->objs.ht_base >> 16) << 4)
- );
- NV_WRITE(NV_PFIFO_RAMFC, 0x00000110); /* RAMIN+0x11000 0.5k */
- NV_WRITE(NV_PFIFO_RAMRO, 0x00000112); /* RAMIN+0x11200 0.5k */
-
dev_priv->objs.first_instance = 0x12000;
dev_priv->objs.free_instance = 1024; /*FIXME*/
dev_priv->objs.num_instance = 1024; /*FIXME*/
else
dev_priv->fb_usable_size=nouveau_mem_fb_amount(dev)-256*1024;
- nouveau_hash_table_init(dev);
-
- if (dev_priv->card_type >= NV_40)
- dev_priv->fb_obj = nouveau_dma_object_create(dev,
- 0, nouveau_mem_fb_amount(dev),
- NV_DMA_ACCESS_RW, NV_DMA_TARGET_VIDMEM);
-
return 0;
}
struct mem_block *cb;
int cb_min_size = nouveau_fifo_number(dev) * NV03_FIFO_SIZE;
- /* allocate one buffer for all the fifos */
- dev_priv->cmdbuf_alloc = nouveau_mem_alloc(dev, 0, 1024*1024, NOUVEAU_MEM_FB, (DRMFILE)-2);
+ nouveau_hash_table_init(dev);
+
+ if (dev_priv->card_type >= NV_40)
+ dev_priv->fb_obj = nouveau_dma_object_create(dev,
+ 0, nouveau_mem_fb_amount(dev),
+ NV_DMA_ACCESS_RW, NV_DMA_TARGET_VIDMEM);
/* Defaults for unconfigured values */
if (!config->cmdbuf.location)