#endif
}
+static inline struct ir3_block *
+ir3_start_block(struct ir3 *ir)
+{
+ return list_first_entry(&ir->block_list, struct ir3_block, node);
+}
+
void ir3_block_add_predecessor(struct ir3_block *block, struct ir3_block *pred);
void ir3_block_remove_predecessor(struct ir3_block *block, struct ir3_block *pred);
unsigned ir3_block_get_pred_index(struct ir3_block *block, struct ir3_block *pred);
* with the end of the program.
*/
assert(input_count == 0 || !ctx->early_input_release ||
- block == list_first_entry(&block->shader->block_list, struct ir3_block, node));
+ block == ir3_start_block(block->shader));
/* remove all the instructions from the list, we'll be adding
* them back in as we go
* a5xx and a6xx do automatically release varying storage at the end.
*/
ctx->early_input_release = true;
- struct ir3_block *first_block =
- list_first_entry(&ir->block_list, struct ir3_block, node);
+ struct ir3_block *start_block = ir3_start_block(ir);
foreach_block (block, &ir->block_list) {
foreach_instr (instr, &block->instr_list) {
- if (is_input(instr) && block != first_block) {
+ if (is_input(instr) && block != start_block) {
ctx->early_input_release = false;
break;
}
regs_to_ssa(struct ir3 *ir)
{
struct ir3_instruction *regfile[2 * MAX_REG] = {};
- struct ir3_block *block =
- list_first_entry(&ir->block_list, struct ir3_block, node);
+ struct ir3_block *block = ir3_start_block(ir);
foreach_instr_safe (instr, &block->instr_list) {
foreach_src (reg, instr) {