DONE;
})
+(define_expand "cstorehf4"
+ [(set (reg:CC FLAGS_REG)
+ (compare:CC (match_operand:HF 2 "cmp_fp_expander_operand")
+ (match_operand:HF 3 "cmp_fp_expander_operand")))
+ (set (match_operand:QI 0 "register_operand")
+ (match_operator 1 "ix86_fp_comparison_operator"
+ [(reg:CC FLAGS_REG)
+ (const_int 0)]))]
+ "TARGET_AVX512FP16"
+{
+ ix86_expand_setcc (operands[0], GET_CODE (operands[1]),
+ operands[2], operands[3]);
+ DONE;
+})
+
(define_expand "cstore<mode>4"
[(set (reg:CC FLAGS_REG)
(compare:CC (match_operand:MODEF 2 "cmp_fp_expander_operand")
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-Ofast -mavx512fp16" } */
+
+int
+f1 (_Float16 x, _Float16 y)
+{
+ return x > y;
+}
+
+int
+f2 (_Float16 x, _Float16 y)
+{
+ return x < y;
+}
+
+/* { dg-final { scan-assembler-times "seta" 2 } } */
+
+int
+f3 (_Float16 x, _Float16 y)
+{
+ return x >= y;
+}
+
+int
+f4 (_Float16 x, _Float16 y)
+{
+ return x <= y;
+}
+
+/* { dg-final { scan-assembler-times "setnb" 2 } } */
+
+int
+f5 (_Float16 x, _Float16 y)
+{
+ return __builtin_isunordered (x, y);
+}
+
+/* { dg-final { scan-assembler-not "vcvtsh2s\[sd\]" } } */
+/* { dg-final { scan-assembler-times "xorl" 5 } } */
+/* { dg-final { scan-assembler-times "vcomish\[^\n\r\]*xmm\[0-9\]" 4 } } */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O2 -mfpmath=sse -mavx512fp16" } */
+
+int
+foo (_Float16 y)
+{
+ return __builtin_isinf (y);
+}
+
+int
+foo2 (_Float16 y)
+{
+ return __builtin_isfinite (y);
+}
+
+int
+foo3 (_Float16 y)
+{
+ return __builtin_signbit(y);
+}
+
+int
+foo4 (_Float16 y)
+{
+ return __builtin_isnormal (y);
+}
+
+/* { dg-final { scan-assembler-not "vcvtsh2s\[sd\]" } } */
+/* { dg-final { scan-assembler-times "vucomish\[^\n\r\]*xmm\[0-9\]" 4 } } */