ARM: dts: imx7s: add CAAM device node
authorRui Miguel Silva <rui.silva@linaro.org>
Thu, 22 Feb 2018 14:22:50 +0000 (14:22 +0000)
committerShawn Guo <shawnguo@kernel.org>
Wed, 28 Feb 2018 06:58:44 +0000 (14:58 +0800)
Add CAAM device node to the i.MX7s device tree.

Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: devicetree@vger.kernel.org
Cc: "Horia Geantă" <horia.geanta@nxp.com>
Cc: Aymen Sghaier <aymen.sghaier@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/imx7s.dtsi

index 02baf42..c579e85 100644 (file)
                                status = "disabled";
                        };
 
+                       crypto: caam@30900000 {
+                               compatible = "fsl,sec-v4.0";
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               reg = <0x30900000 0x40000>;
+                               ranges = <0 0x30900000 0x40000>;
+                               interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clks IMX7D_CAAM_CLK>,
+                                        <&clks IMX7D_AHB_CHANNEL_ROOT_CLK>;
+                               clock-names = "ipg", "aclk";
+
+                               sec_jr0: jr0@1000 {
+                                       compatible = "fsl,sec-v4.0-job-ring";
+                                       reg = <0x1000 0x1000>;
+                                       interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+                               };
+
+                               sec_jr1: jr1@2000 {
+                                       compatible = "fsl,sec-v4.0-job-ring";
+                                       reg = <0x2000 0x1000>;
+                                       interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+                               };
+
+                               sec_jr2: jr1@3000 {
+                                       compatible = "fsl,sec-v4.0-job-ring";
+                                       reg = <0x3000 0x1000>;
+                                       interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+                               };
+                       };
+
                        flexcan1: can@30a00000 {
                                compatible = "fsl,imx7d-flexcan", "fsl,imx6q-flexcan";
                                reg = <0x30a00000 0x10000>;