* doc/c-tree.texi: Use `@.' where appropriate.
* doc/extend.texi: Likewise.
* doc/install.texi: Likewise.
* doc/invoke.texi: Likewise.
* doc/loop.texi: Likewise.
* doc/makefile.texi: Likewise.
* doc/md.texi: Likewise.
* doc/passes.texi: Likewise.
* doc/standards.texi: Likewise.
* doc/tm.texi: Likewise.
From-SVN: r132361
+2008-02-16 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * doc/c-tree.texi: Use `@.' where appropriate.
+ * doc/extend.texi: Likewise.
+ * doc/install.texi: Likewise.
+ * doc/invoke.texi: Likewise.
+ * doc/loop.texi: Likewise.
+ * doc/makefile.texi: Likewise.
+ * doc/md.texi: Likewise.
+ * doc/passes.texi: Likewise.
+ * doc/standards.texi: Likewise.
+ * doc/tm.texi: Likewise.
+
2008-02-15 Jakub Jelinek <jakub@redhat.com>
PR middle-end/35196
@item OMP_RETURN
This does not represent any OpenMP directive, it is an artificial
-marker to indicate the end of the body of an OpenMP. It is used
+marker to indicate the end of the body of an OpenMP@. It is used
by the flow graph (@code{tree-cfg.c}) and OpenMP region
building code (@code{omp-low.c}).
@item l1_text
@cindex @code{l1_text} function attribute
This attribute specifies a function to be placed into L1 Instruction
-SRAM. The function will be put into a specific section named @code{.l1.text}.
+SRAM@. The function will be put into a specific section named @code{.l1.text}.
With @option{-mfdpic}, function calls with a such function as the callee
or caller will use inlined PLT.
Increase the minimum alignment of each @var{variable} to @var{alignment}.
This is the same as GCC's @code{aligned} attribute @pxref{Variable
Attributes}). Macro expansion occurs on the arguments to this pragma
-when compiling C and Objective-C. It does not currently occur when
+when compiling C and Objective-C@. It does not currently occur when
compiling C++, but this is a bug which may be fixed in a future
release.
because otherwise certain simple expressions become undefined. However,
because it would surprise most programmers, G++ treats dereferencing a
pointer to volatile object of complete type when the value is unused as
-GCC would do for an equivalent type in C. When the object has incomplete
+GCC would do for an equivalent type in C@. When the object has incomplete
type, G++ issues a warning; if you wish to force an error, you must
force a conversion to rvalue with, for instance, a static cast.
@item GNU Multiple Precision Library (GMP) version 4.1 (or later)
-Necessary to build GCC. If you do not have it installed in your
+Necessary to build GCC@. If you do not have it installed in your
library search path, you will have to configure with the
@option{--with-gmp} configure option. See also
@option{--with-gmp-lib} and @option{--with-gmp-include}.
@item MPFR Library version 2.3.0 (or later)
-Necessary to build GCC. It can be downloaded from
+Necessary to build GCC@. It can be downloaded from
@uref{http://www.mpfr.org/}. The version of MPFR that is bundled with
GMP 4.1.x contains numerous bugs. Although GCC may appear to function
with the buggy versions of MPFR, there are a few bugs that will not be
to @env{CC}. The description for the @option{munix=} option contains
a list of the predefines used with each standard.
-As of GCC 4.1, @env{DWARF2} exception handling is available on HP-UX.
+As of GCC 4.1, @env{DWARF2} exception handling is available on HP-UX@.
It is now the default. This exposed a bug in the handling of data
relocations in the GAS assembler. The handling of 64-bit data relocations
was seriously broken, affecting debugging and exception support on all
Cross-compilers for the MIPS as target using the MIPS assembler
currently do not work, because the auxiliary programs
@file{mips-tdump.c} and @file{mips-tfile.c} can't be compiled on
-anything but a MIPS. It does work to cross compile for a MIPS
+anything but a MIPS@. It does work to cross compile for a MIPS
if you use the GNU assembler and linker.
The assembler from GNU binutils 2.17 and earlier has a bug in the way
Unfortunately, there are some characters which ISO C and ISO C++ allow
in identifiers that when turned into NFC aren't allowable as
identifiers. That is, there's no way to use these symbols in portable
-ISO C or C++ and have all your identifiers in NFC.
+ISO C or C++ and have all your identifiers in NFC@.
@option{-Wnormalized=id} suppresses the warning for these characters.
It is hoped that future versions of the standards involved will correct
this, which is why this option is not the default.
@item storeccp
@opindex fdump-tree-storeccp
-Dump each function after STORE-CCP. The file name is made by appending
+Dump each function after STORE-CCP@. The file name is made by appending
@file{.storeccp} to the source file name.
@item pre
@item -fforward-propagate
@opindex fforward-propagate
-Perform a forward propagation pass on RTL. The pass tries to combine two
+Perform a forward propagation pass on RTL@. The pass tries to combine two
instructions and checks if the result can be simplified. If loop unrolling
is active, two passes are performed and the second is scheduled after
loop unrolling.
@item -fdce
@opindex fdce
-Perform dead code elimination (DCE) on RTL.
+Perform dead code elimination (DCE) on RTL@.
Enabled by default at @option{-O} and higher.
@item -fdse
@opindex fdse
-Perform dead store elimination (DSE) on RTL.
+Perform dead store elimination (DSE) on RTL@.
Enabled by default at @option{-O} and higher.
@item -fif-conversion
@opindex msim
Specifies that the program will be run on the simulator. This causes
an alternate runtime library to be linked in which supports, for
-example, file I/O. You must not use this option when generating
+example, file I/O@. You must not use this option when generating
programs that will run on real hardware; you must provide your own
runtime library for whatever I/O functions are needed.
@item -m5200
@opindex m5200
-Generate output for a 520X ColdFire CPU. This is the default
+Generate output for a 520X ColdFire CPU@. This is the default
when the compiler is configured for 520X-based systems.
It is equivalent to @option{-mcpu=5206}, and is now deprecated
in favor of that option.
@item -m5206e
@opindex m5206e
-Generate output for a 5206e ColdFire CPU. The option is now
+Generate output for a 5206e ColdFire CPU@. The option is now
deprecated in favor of the equivalent @option{-mcpu=5206e}.
@item -m528x
@item -m5307
@opindex m5307
-Generate output for a ColdFire 5307 CPU. The option is now deprecated
+Generate output for a ColdFire 5307 CPU@. The option is now deprecated
in favor of the equivalent @option{-mcpu=5307}.
@item -m5407
@opindex m5407
-Generate output for a ColdFire 5407 CPU. The option is now deprecated
+Generate output for a ColdFire 5407 CPU@. The option is now deprecated
in favor of the equivalent @option{-mcpu=5407}.
@item -mcfv4e
@opindex mhard-float
@opindex m68881
Generate floating-point instructions. This is the default for 68020
-and above, and for ColdFire devices that have an FPU. It defines the
+and above, and for ColdFire devices that have an FPU@. It defines the
macro @samp{__HAVE_68881__} on M680x0 targets and @samp{__mcffpu__}
on ColdFire targets.
@itemx -mno-dsp
@opindex mdsp
@opindex mno-dsp
-Use (do not use) revision 1 of the MIPS DSP ASE.
+Use (do not use) revision 1 of the MIPS DSP ASE@.
@xref{MIPS DSP Built-in Functions}. This option defines the
preprocessor macro @samp{__mips_dsp}. It also defines
@samp{__mips_dsp_rev} to 1.
@itemx -mno-dspr2
@opindex mdspr2
@opindex mno-dspr2
-Use (do not use) revision 2 of the MIPS DSP ASE.
+Use (do not use) revision 2 of the MIPS DSP ASE@.
@xref{MIPS DSP Built-in Functions}. This option defines the
preprocessor macros @samp{__mips_dsp} and @samp{__mips_dspr2}.
It also defines @samp{__mips_dsp_rev} to 2.
@opindex mlocal-sdata
@opindex mno-local-sdata
Extend (do not extend) the @option{-G} behavior to local data too,
-such as to static variables in C. @option{-mlocal-sdata} is the
+such as to static variables in C@. @option{-mlocal-sdata} is the
default for all configurations.
If the linker complains that an application is using too much small data,
@opindex mxl-compat
@opindex mno-xl-compat
Produce code that conforms more closely to IBM XL compiler semantics
-when using AIX-compatible ABI. Pass floating-point arguments to
+when using AIX-compatible ABI@. Pass floating-point arguments to
prototyped functions beyond the register save area (RSA) on the stack
in addition to argument FPRs. Do not assume that most significant
double in 128-bit long double value is properly rounded when comparing
enumerate and test loop exits, can be expected to work).
Body of the loop is the set of blocks that are dominated by its header,
-and reachable from its latch against the direction of edges in CFG. The
+and reachable from its latch against the direction of edges in CFG@. The
loops are organized in a containment hierarchy (tree) such that all the
loops immediately contained inside loop L are the children of L in the
tree. This tree is represented by the @code{struct loops} structure.
Each basic block contains the reference to the innermost loop it belongs
to (@code{loop_father}). For this reason, it is only possible to have
one @code{struct loops} structure initialized at the same time for each
-CFG. The global variable @code{current_loops} contains the
+CFG@. The global variable @code{current_loops} contains the
@code{struct loops} structure. Many of the loop manipulation functions
assume that dominance information is up-to-date.
@item @code{LOOPS_MAY_HAVE_MULTIPLE_LATCHES}: If this flag is set, no
changes to CFG will be performed in the loop analysis, in particular,
loops with multiple latch edges will not be disambiguated. If a loop
-has multiple latches, its latch block is set to NULL. Most of
+has multiple latches, its latch block is set to NULL@. Most of
the loop manipulation functions will not work for loops in this shape.
No other flags that require CFG changes can be passed to
loop_optimizer_init.
@itemize
@item @code{create_iv}: Creates a new induction variable. Only works on
-GIMPLE. @code{standard_iv_increment_position} can be used to find a
+GIMPLE@. @code{standard_iv_increment_position} can be used to find a
suitable place for the iv increment.
@item @code{duplicate_loop_to_header_edge},
@code{tree_duplicate_loop_to_header_edge}: These functions (on RTL and
Throughout the loop optimizations on tree level, one extra condition is
enforced on the SSA form: No SSA name is used outside of the loop in
that it is defined. The SSA form satisfying this condition is called
-``loop-closed SSA form'' -- LCSSA. To enforce LCSSA, PHI nodes must be
+``loop-closed SSA form'' -- LCSSA@. To enforce LCSSA, PHI nodes must be
created at the exits of the loops for the SSA names that are used
outside of them. Only the real operands (not virtual SSA names) are
held in LCSSA, in order to save memory.
@cindex IV analysis on GIMPLE
Scalar evolutions (SCEV) are used to represent results of induction
-variable analysis on GIMPLE. They enable us to represent variables with
+variable analysis on GIMPLE@. They enable us to represent variables with
complicated behavior in a simple and consistent way (we only use it to
express values of polynomial induction variables, but it is possible to
extend it). The interfaces to SCEV analysis are declared in
@item @code{noloop_assumptions} on RTL, @code{may_be_zero} on GIMPLE: If
this condition is true, the loop exits in the first iteration.
@item @code{infinite}: If this condition is true, the loop is infinite.
-This condition is only available on RTL. On GIMPLE, conditions for
+This condition is only available on RTL@. On GIMPLE, conditions for
finiteness of the loop are included in @code{assumptions}.
@item @code{niter_expr} on RTL, @code{niter} on GIMPLE: The expression
that gives number of iterations. The number of iterations is defined as
@code{check_simple_exit}. There are also functions that pass through
all the exits of a loop and try to find one with easy to determine
number of iterations -- @code{find_loop_niter} on GIMPLE and
-@code{find_simple_exit} on RTL. Finally, there are functions that
+@code{find_simple_exit} on RTL@. Finally, there are functions that
provide the same information, but additionally cache it, so that
repeated calls to number of iterations are not so costly --
@code{number_of_latch_executions} on GIMPLE and @code{get_simple_loop_desc}
queries to the loop body representation.
Three types of data references are currently handled: ARRAY_REF,
-INDIRECT_REF and COMPONENT_REF. The data structure for the data reference
+INDIRECT_REF and COMPONENT_REF@. The data structure for the data reference
is @code{data_reference}, where @code{data_reference_p} is a name of a
pointer to the data reference structure. The structure contains the
following elements:
is also termed the @file{stage0} GCC.}.
You will invoke this target if you need to test or debug the
-stage@var{N} GCC. If you only need to execute GCC (but you need
+stage@var{N} GCC@. If you only need to execute GCC (but you need
not run @samp{make} either to rebuild it or to run test suites),
you should be able to work directly in the @file{stage@var{N}-gcc}
directory. This makes it easier to debug multiple stages in
@item @samp{vec_pack_trunc_@var{m}}
Narrow (demote) and merge the elements of two vectors. Operands 1 and 2
are vectors of the same mode having N integral or floating point elements
-of size S. Operand 0 is the resulting vector in which 2*N elements of
+of size S@. Operand 0 is the resulting vector in which 2*N elements of
size N/2 are concatenated after narrowing them down using truncation.
@cindex @code{vec_pack_ssat_@var{m}} instruction pattern
@item @samp{vec_pack_sfix_trunc_@var{m}}, @samp{vec_pack_ufix_trunc_@var{m}}
Narrow, convert to signed/unsigned integral type and merge the elements
of two vectors. Operands 1 and 2 are vectors of the same mode having N
-floating point elements of size S. Operand 0 is the resulting vector
+floating point elements of size S@. Operand 0 is the resulting vector
in which 2*N elements of size N/2 are concatenated.
@cindex @code{vec_unpacks_hi_@var{m}} instruction pattern
@item @samp{vec_unpacks_hi_@var{m}}, @samp{vec_unpacks_lo_@var{m}}
Extract and widen (promote) the high/low part of a vector of signed
integral or floating point elements. The input vector (operand 1) has N
-elements of size S. Widen (promote) the high/low elements of the vector
+elements of size S@. Widen (promote) the high/low elements of the vector
using signed or floating point extension and place the resulting N/2
values of size 2*S in the output vector (operand 0).
@itemx @samp{vec_unpacku_float_hi_@var{m}}, @samp{vec_unpacku_float_lo_@var{m}}
Extract, convert to floating point type and widen the high/low part of a
vector of signed/unsigned integral elements. The input vector (operand 1)
-has N elements of size S. Convert the high/low elements of the vector using
+has N elements of size S@. Convert the high/low elements of the vector using
floating point conversion and place the resulting N/2 values of size 2*S in
the output vector (operand 0).
@item @samp{vec_widen_umult_hi_@var{m}}, @samp{vec_widen_umult_lo_@var{m}}
@itemx @samp{vec_widen_smult_hi_@var{m}}, @samp{vec_widen_smult_lo_@var{m}}
Signed/Unsigned widening multiplication. The two inputs (operands 1 and 2)
-are vectors with N signed/unsigned elements of size S. Multiply the high/low
+are vectors with N signed/unsigned elements of size S@. Multiply the high/low
elements of the two vectors, and put the N/2 products of size 2*S in the
output vector (operand 0).
variable is an aggregate type, then the variable is replaced with the
return value for the function (i.e., the function's DECL_RESULT). This
is equivalent to the C++ named return value optimization applied to
-GIMPLE. The pass is located in @file{tree-nrv.c} and is described by
+GIMPLE@. The pass is located in @file{tree-nrv.c} and is described by
@code{pass_nrv}.
@item Return slot optimization
The ISO C++ committee is working on a new ISO C++ standard, dubbed
C++0x, that is intended to be published by 2009. C++0x contains several
changes to the C++ language, some of which have been implemented in an
-experimental C++0x mode in GCC. The C++0x mode in GCC tracks the draft
+experimental C++0x mode in GCC@. The C++0x mode in GCC tracks the draft
working paper for the C++0x standard; the latest working paper is
available on the ISO C++ committee's web site at
@uref{http://www.open-std.org/jtc1/sc22/wg21/}. For information
bit set. This denotes the scheduler pass for which the data should be
provided. The target backend should modify @var{flags} by modifying
the bits corresponding to the following features: USE_DEPS_LIST, USE_GLAT,
-DETACH_LIFE_INFO, and DO_SPECULATION. For the DO_SPECULATION feature
+DETACH_LIFE_INFO, and DO_SPECULATION@. For the DO_SPECULATION feature
an additional structure @var{spec_info} should be filled by the target.
The structure describes speculation types that can be used in the scheduler.
@end deftypefn
before and after that, output the additional assembler syntax for defining
the name, and a newline.
-There are two ways of handling global BSS. One is to define either
+There are two ways of handling global BSS@. One is to define either
this macro or its aligned counterpart, @code{ASM_OUTPUT_ALIGNED_BSS}.
The other is to have @code{TARGET_ASM_SELECT_SECTION} return a
switchable BSS section (@pxref{TARGET_HAVE_SWITCHABLE_BSS_SECTIONS}).
@deftypefn {Target Hook} bool TARGET_COMMUTATIVE_P (rtx @var{x}, @var{outer_code})
This target hook returns @code{true} if @var{x} is considered to be commutative.
Usually, this is just COMMUTATIVE_P (@var{x}), but the HP PA doesn't consider
-PLUS to be commutative inside a MEM. @var{outer_code} is the rtx code
+PLUS to be commutative inside a MEM@. @var{outer_code} is the rtx code
of the enclosing rtl, if known, otherwise it is UNKNOWN.
@end deftypefn
projects / platform / upstream / gcc.git / commitdiff