case nir_intrinsic_load_ring_gsvs_amd:
case nir_intrinsic_load_lds_ngg_scratch_base_amd:
case nir_intrinsic_load_lds_ngg_gs_out_vertex_base_amd:
- result = ctx->abi->intrinsic_load(ctx->abi, instr->intrinsic);
+ result = ctx->abi->intrinsic_load(ctx->abi, instr);
break;
case nir_intrinsic_load_merged_wave_info_amd:
result = ac_get_arg(&ctx->ac, ctx->args->merged_wave_info);
LLVMValueRef (*emit_fbfetch)(struct ac_shader_abi *abi);
- LLVMValueRef (*intrinsic_load)(struct ac_shader_abi *abi, nir_intrinsic_op op);
+ LLVMValueRef (*intrinsic_load)(struct ac_shader_abi *abi, nir_intrinsic_instr *intrin);
/* Whether to clamp the shadow reference value to [0,1]on GFX8. Radeonsi currently
* uses it due to promoting D16 to D32, but radv needs it off. */
LLVMSetAlignment(ctx->esgs_ring, 64 * 1024);
}
-static LLVMValueRef radv_intrinsic_load(struct ac_shader_abi *abi, nir_intrinsic_op op)
+static LLVMValueRef radv_intrinsic_load(struct ac_shader_abi *abi, nir_intrinsic_instr *intrin)
{
struct radv_shader_context *ctx = radv_shader_context_from_abi(abi);
- switch (op) {
+ switch (intrin->intrinsic) {
case nir_intrinsic_load_base_vertex:
case nir_intrinsic_load_first_vertex:
- return radv_load_base_vertex(abi, op == nir_intrinsic_load_base_vertex);
+ return radv_load_base_vertex(abi, intrin->intrinsic == nir_intrinsic_load_base_vertex);
case nir_intrinsic_load_ring_tess_factors_amd:
return ctx->hs_ring_tess_factor;
case nir_intrinsic_load_ring_tess_offchip_amd:
LLVMBuildRet(builder, ret);
}
-static LLVMValueRef si_llvm_load_intrinsic(struct ac_shader_abi *abi, nir_intrinsic_op op)
+static LLVMValueRef si_llvm_load_intrinsic(struct ac_shader_abi *abi, nir_intrinsic_instr *intrin)
{
struct si_shader_context *ctx = si_shader_context_from_abi(abi);
- switch (op) {
+ switch (intrin->intrinsic) {
case nir_intrinsic_load_ring_tess_offchip_amd:
return ctx->tess_offchip_ring;