re PR target/33555 (x86 missed opportunity for sbb)

        PR target/33555
        * config/i386/i386.md (*x86_movsicc_0_m1_se): New insn pattern.
        (*x86_movdicc_0_m1_se): Ditto.

testsuite/ChangeLog:

        PR target/33555
        * gcc.target/i386/pr33555.c: New test.

From-SVN: r132414

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3a23574..e023878 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,11 @@
 2008-02-19  Uros Bizjak  <ubizjak@gmail.com>
 
+       PR target/33555
+       * config/i386/i386.md (*x86_movsicc_0_m1_se): New insn pattern.
+       (*x86_movdicc_0_m1_se): Ditto.
+
+2008-02-19  Uros Bizjak  <ubizjak@gmail.com>
+
        * config/i386/sfp-machine.h (__gcc_CMPtype): New typedef.
        (CMPtype): Define as __gcc_CMPtype.
        * config/rs6000/sfp-machine.h (__gcc_CMPtype): New typedef.

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 1724c0d..3c9c2cc 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -19402,6 +19402,21 @@
    (set_attr "mode" "DI")
    (set_attr "length_immediate" "0")])
 
+(define_insn "*x86_movdicc_0_m1_se"
+  [(set (match_operand:DI 0 "register_operand" "=r")
+       (sign_extract:DI (match_operand 1 "ix86_carry_flag_operator" "")
+                        (const_int 1)
+                        (const_int 0)))
+   (clobber (reg:CC FLAGS_REG))]
+  ""
+  "sbb{q}\t%0, %0"
+  [(set_attr "type" "alu")
+   (set_attr "pent_pair" "pu")
+   (set_attr "memory" "none")
+   (set_attr "imm_disp" "false")
+   (set_attr "mode" "DI")
+   (set_attr "length_immediate" "0")])
+
 (define_insn "*movdicc_c_rex64"
   [(set (match_operand:DI 0 "register_operand" "=r,r")
        (if_then_else:DI (match_operator 1 "ix86_comparison_operator"
@@ -19445,6 +19460,21 @@
    (set_attr "mode" "SI")
    (set_attr "length_immediate" "0")])
 
+(define_insn "*x86_movsicc_0_m1_se"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+       (sign_extract:SI (match_operand 1 "ix86_carry_flag_operator" "")
+                        (const_int 1)
+                        (const_int 0)))
+   (clobber (reg:CC FLAGS_REG))]
+  ""
+  "sbb{l}\t%0, %0"
+  [(set_attr "type" "alu")
+   (set_attr "pent_pair" "pu")
+   (set_attr "memory" "none")
+   (set_attr "imm_disp" "false")
+   (set_attr "mode" "SI")
+   (set_attr "length_immediate" "0")])
+
 (define_insn "*movsicc_noc"
   [(set (match_operand:SI 0 "register_operand" "=r,r")
        (if_then_else:SI (match_operator 1 "ix86_comparison_operator"

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 55715a6..db65ae6 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2008-02-19  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/33555
+       * gcc.target/i386/pr33555.c: New test.
+       
 2008-02-18  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR target/35189

diff --git a/gcc/testsuite/gcc.target/i386/pr33555.c b/gcc/testsuite/gcc.target/i386/pr33555.c
new file mode 100644 (file)
index 0000000..21c56b7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr33555.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler "sbbl" } } */
+
+int test(unsigned long a, unsigned long b)
+{
+  return -(a < b);
+}
+