2002-10-24 Richard Sandiford <rsandifo@redhat.com>
+ * config.gcc (mips64vr-*-elf*, mips64vrel-*-elf*): Add
+ MIPS_MARCH_CONTROLS_SOFT_FLOAT=1 to $tm_defines.
+ * config/mips/mips.c (MIPS_MARCH_CONTROLS_SOFT_FLOAT): Default to 0.
+ (override_options): Base default setting of MASK_SOFT_FLOAT on -march
+ if MIPS_MARCH_CONTROLS_SOFT_FLOAT.
+
+2002-10-24 Richard Sandiford <rsandifo@redhat.com>
+
* optabs.c (expand_binop): Don't reuse the shift target in the
middle of shift sequences.
;;
mips64vr-*-elf* | mips64vrel-*-elf*)
tm_file="mips/vr.h ${tm_file} mips/elf64.h"
- tm_defines="MIPS_ABI_DEFAULT=ABI_O64"
+ tm_defines="MIPS_ABI_DEFAULT=ABI_O64 MIPS_MARCH_CONTROLS_SOFT_FLOAT=1"
tmake_file=mips/t-vr
;;
mips64orion-*-elf* | mips64orionel-*-elf*)
{ 0, 0, 0 }
};
\f
+/* Nonzero if -march should decide the default value of MASK_SOFT_FLOAT. */
+#ifndef MIPS_MARCH_CONTROLS_SOFT_FLOAT
+#define MIPS_MARCH_CONTROLS_SOFT_FLOAT 0
+#endif
+\f
/* Initialize the GCC target structure. */
#undef TARGET_ASM_ALIGNED_HI_OP
#define TARGET_ASM_ALIGNED_HI_OP "\t.half\t"
target_flags &= ~MASK_LONG64;
}
+ if (MIPS_MARCH_CONTROLS_SOFT_FLOAT
+ && (target_flags_explicit & MASK_SOFT_FLOAT) == 0)
+ {
+ /* For some configurations, it is useful to have -march control
+ the default setting of MASK_SOFT_FLOAT. */
+ switch ((int) mips_arch)
+ {
+ case PROCESSOR_R4100:
+ case PROCESSOR_R4120:
+ target_flags |= MASK_SOFT_FLOAT;
+ break;
+
+ default:
+ target_flags &= ~MASK_SOFT_FLOAT;
+ break;
+ }
+ }
+
if (mips_abi != ABI_32 && mips_abi != ABI_O64)
flag_pcc_struct_return = 0;