These macros are not used anywhere in the boards code.
Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: Dirk Eibach <dirk.eibach@gdsys.cc>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Dennis Gilmore <dgilmore@redhat.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
DECLARE_GLOBAL_DATA_PTR;
-#define ETH_PHY_CTRL_REG 0
-#define ETH_PHY_CTRL_POWER_DOWN_BIT 11
-#define ETH_PHY_CTRL_POWER_DOWN_MASK (1 << ETH_PHY_CTRL_POWER_DOWN_BIT)
-
/*
* Those values and defines are taken from the Marvell U-Boot version
* "u-boot-2013.01-2016_T1.0.eng_drop_v10"
DECLARE_GLOBAL_DATA_PTR;
-#define ETH_PHY_CTRL_REG 0
-#define ETH_PHY_CTRL_POWER_DOWN_BIT 11
-#define ETH_PHY_CTRL_POWER_DOWN_MASK (1 << ETH_PHY_CTRL_POWER_DOWN_BIT)
-
/*
* Those values and defines are taken from the Marvell U-Boot version
* "u-boot-2013.01-2014_T3.0"
DECLARE_GLOBAL_DATA_PTR;
-#define ETH_PHY_CTRL_REG 0
-#define ETH_PHY_CTRL_POWER_DOWN_BIT 11
-#define ETH_PHY_CTRL_POWER_DOWN_MASK (1 << ETH_PHY_CTRL_POWER_DOWN_BIT)
-
#define DB_GP_88F68XX_GPP_OUT_ENA_LOW 0x7fffffff
#define DB_GP_88F68XX_GPP_OUT_ENA_MID 0xffffefff
DECLARE_GLOBAL_DATA_PTR;
-#define ETH_PHY_CTRL_REG 0
-#define ETH_PHY_CTRL_POWER_DOWN_BIT 11
-#define ETH_PHY_CTRL_POWER_DOWN_MASK BIT(ETH_PHY_CTRL_POWER_DOWN_BIT)
-
/*
* Those values and defines are taken from the Marvell U-Boot version
* "u-boot-2013.01-15t1-helios4" as well as the upstream config for clearfog
DECLARE_GLOBAL_DATA_PTR;
-#define ETH_PHY_CTRL_REG 0
-#define ETH_PHY_CTRL_POWER_DOWN_BIT 11
-#define ETH_PHY_CTRL_POWER_DOWN_MASK (1 << ETH_PHY_CTRL_POWER_DOWN_BIT)
-
/*
* Those values and defines are taken from the Marvell U-Boot version
* "u-boot-2013.01-15t1-clearfog"