net: phy: dp83867: Add documentation for CLK_OUT pin muxing
authorWadim Egorov <w.egorov@phytec.de>
Wed, 14 Feb 2018 16:07:12 +0000 (17:07 +0100)
committerDavid S. Miller <davem@davemloft.net>
Wed, 14 Feb 2018 20:33:43 +0000 (15:33 -0500)
Add documentation of ti,clk-output-sel which can be used to select
a specific clock for CLK_OUT.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Documentation/devicetree/bindings/net/ti,dp83867.txt

index 02c4353..9ef9338 100644 (file)
@@ -25,6 +25,8 @@ Optional property:
                                    software needs to take when this pin is
                                    strapped in these modes. See data manual
                                    for details.
+       - ti,clk-output-sel - Muxing option for CLK_OUT pin - see dt-bindings/net/ti-dp83867.h
+                                   for applicable values.
 
 Note: ti,min-output-impedance and ti,max-output-impedance are mutually
       exclusive. When both properties are present ti,max-output-impedance