[X86][AsmParser] Emit an error when RIP-relative instructions are used in 32-bit...
authorJessica Paquette <jpaquette@apple.com>
Tue, 26 Jun 2018 20:33:46 +0000 (20:33 +0000)
committerJessica Paquette <jpaquette@apple.com>
Tue, 26 Jun 2018 20:33:46 +0000 (20:33 +0000)
Right now, when we use RIP-relative instructions in 32-bit mode, we'll just
assert and crash.

This adds an error message which tells the user that they can't do that in
32-bit mode, so that we don't crash (and also can see the issue outside of
assert builds).

llvm-svn: 335658

llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
llvm/test/CodeGen/X86/eip-addressing-i386.ll [new file with mode: 0644]

index a7dbdee..6bb82da 100644 (file)
@@ -974,6 +974,13 @@ static unsigned MatchRegisterName(StringRef Name);
 static bool CheckBaseRegAndIndexRegAndScale(unsigned BaseReg, unsigned IndexReg,
                                             unsigned Scale, bool Is64BitMode,
                                             StringRef &ErrMsg) {
+  // RIP/EIP-relative addressing is only supported in 64-bit mode.
+  if (!Is64BitMode && BaseReg != 0 &&
+      (BaseReg == X86::RIP || BaseReg == X86::EIP)) {
+    ErrMsg = "RIP-relative addressing requires 64-bit mode";
+    return true;
+  }
+
   // If we have both a base register and an index register make sure they are
   // both 64-bit or 32-bit registers.
   // To support VSIB, IndexReg can be 128-bit or 256-bit registers.
diff --git a/llvm/test/CodeGen/X86/eip-addressing-i386.ll b/llvm/test/CodeGen/X86/eip-addressing-i386.ll
new file mode 100644 (file)
index 0000000..ff4a4c5
--- /dev/null
@@ -0,0 +1,13 @@
+; RUN: not llc -mtriple i386-apple-- -o /dev/null < %s 2>&1| FileCheck %s
+; CHECK: <inline asm>:1:13: error: RIP-relative addressing requires 64-bit mode
+; CHECK-NEXT: jmpl *_foo(%eip)
+
+; Make sure that we emit an error if we encounter RIP-relative instructions in
+; 32-bit mode.
+
+define i32 @foo() { ret i32 0 }
+
+define i32 @bar() {
+  call void asm sideeffect "jmpl *_foo(%eip)\0A", "~{dirflag},~{fpsr},~{flags}"()
+  ret i32 0
+}