darwin-c.c, [...]: Follow spelling conventions.

	* config/darwin-c.c, config/alpha/alpha.c, config/i386/i386.c,
	config/i386/predicates.md, config/sparc/sparc.c: Follow
	spelling conventions.

From-SVN: r87489

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 74fa6ae..e8f96df 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2004-09-14  Kazu Hirata  <kazu@cs.umass.edu>
+
+       * config/darwin-c.c, config/alpha/alpha.c, config/i386/i386.c,
+       config/i386/predicates.md, config/sparc/sparc.c: Follow
+       spelling conventions.
+
 2004-09-14  Zdenek Dvorak  <rakdver@atrey.karlin.mff.cuni.cz>
            Steven Bosscher  <stevenb@suse.de>
 

diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c
index 532fe66..54d78f6 100644 (file)
--- a/gcc/config/alpha/alpha.c
+++ b/gcc/config/alpha/alpha.c
@@ -6179,7 +6179,7 @@ set_frame_related_p (void)
 #define FRP(exp)  (start_sequence (), exp, set_frame_related_p ())
 
 /* Generates a store with the proper unwind info attached.  VALUE is
-   stored at BASE_REG+BASE_OFS.  If FRAME_BIAS is non-zero, then BASE_REG
+   stored at BASE_REG+BASE_OFS.  If FRAME_BIAS is nonzero, then BASE_REG
    contains SP+FRAME_BIAS, and that is the unwind info that should be
    generated.  If FRAME_REG != VALUE, then VALUE is being stored on
    behalf of FRAME_REG, and FRAME_REG should be present in the unwind.  */

diff --git a/gcc/config/darwin-c.c b/gcc/config/darwin-c.c
index e8b188f..9adf249 100644 (file)
--- a/gcc/config/darwin-c.c
+++ b/gcc/config/darwin-c.c
@@ -449,7 +449,7 @@ darwin_register_frameworks (int stdinc)
    fails to find a header.  We search each file in the include stack,
    using FUNC, starting from the most deeply nested include and
    finishing with the main input file.  We stop searching when FUNC
-   returns non-zero.  */
+   returns nonzero.  */
 
 static const char*
 find_subframework_header (cpp_reader *pfile, const char *header, cpp_dir **dirp)

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 8f5364f..57e785d 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -9960,7 +9960,7 @@ ix86_split_long_move (rtx operands[])
        }
     }
 
-  /* If optimizing for size, attempt to locally unCSE non-zero constants.  */
+  /* If optimizing for size, attempt to locally unCSE nonzero constants.  */
   if (optimize_size)
     {
       if (GET_CODE (operands[5]) == CONST_INT

diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index 96be8b9..ec747ae 100644 (file)
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -571,7 +571,7 @@
     (match_operand 0 "reg_or_pm1_operand")))
 
 ;; Return true if OP is a vector load from the constant pool with just
-;; the first element non-zero.
+;; the first element nonzero.
 (define_predicate "zero_extended_scalar_load_operand"
   (match_code "mem")
 {

diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 708894d..dd441ba 100644 (file)
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -1644,7 +1644,7 @@ sparc_emit_set_const32 (rtx op0, rtx op1)
 
 \f
 /* Load OP1, a symbolic 64-bit constant, into OP0, a DImode register.
-   If TEMP is non-zero, we are forbidden to use any other scratch
+   If TEMP is nonzero, we are forbidden to use any other scratch
    registers.  Otherwise, we are allowed to generate them as needed.
 
    Note that TEMP may have TImode if the code model is TARGET_CM_MEDANY