s = of_read_number(range + na + pna, ns);
da = of_read_number(addr, na);
- pr_debug("default map, cp=%llx, s=%llx, da=%llx\n",
- (unsigned long long)cp, (unsigned long long)s,
- (unsigned long long)da);
+ pr_debug("default map, cp=%llx, s=%llx, da=%llx\n", cp, s, da);
if (da < cp || da >= (cp + s))
return OF_BAD_ADDR;
s = of_read_number(range + na + pna, ns);
da = of_read_number(addr + 1, na - 1);
- pr_debug("PCI map, cp=%llx, s=%llx, da=%llx\n",
- (unsigned long long)cp, (unsigned long long)s,
- (unsigned long long)da);
+ pr_debug("PCI map, cp=%llx, s=%llx, da=%llx\n", cp, s, da);
if (da < cp || da >= (cp + s))
return OF_BAD_ADDR;
s = of_read_number(range + na + pna, ns);
da = of_read_number(addr + 1, na - 1);
- pr_debug("ISA map, cp=%llx, s=%llx, da=%llx\n",
- (unsigned long long)cp, (unsigned long long)s,
- (unsigned long long)da);
+ pr_debug("ISA map, cp=%llx, s=%llx, da=%llx\n", cp, s, da);
if (da < cp || da >= (cp + s))
return OF_BAD_ADDR;
finish:
of_dump_addr("parent translation for:", addr, pna);
- pr_debug("with offset: %llx\n", (unsigned long long)offset);
+ pr_debug("with offset: %llx\n", offset);
/* Translate it into parent bus space */
return pbus->translate(addr, offset, pna);
phys_initrd_start = start;
phys_initrd_size = end - start;
- pr_debug("initrd_start=0x%llx initrd_end=0x%llx\n",
- (unsigned long long)start, (unsigned long long)end);
+ pr_debug("initrd_start=0x%llx initrd_end=0x%llx\n", start, end);
}
#else
static inline void early_init_dt_check_for_initrd(unsigned long node)
if (size == 0)
continue;
- pr_debug(" - %llx , %llx\n", (unsigned long long)base,
- (unsigned long long)size);
+ pr_debug(" - %llx, %llx\n", base, size);
early_init_dt_add_memory_arch(base, size);