ARM: dts: Add dwmmc DT nodes for exynos5420 SOC

This patch adds the mmc device tree node entries for exynos5420 SOC.
Exynos5420 has a different version of DWMMC controller,so a new
compatible string is used to distinguish it from the prior SOC's.

Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
index c67b975..532b1d4 100644 (file)
--- a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt
@@ -16,6 +16,8 @@ Required Properties:
          specific extensions.
        - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250
          specific extensions.
+       - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420
+         specific extensions.
 
 * samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface
   unit (ciu) clock. This property is applicable only for Exynos5 SoC's and

diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts
index 79524c7..fb5a1e2 100644 (file)
--- a/arch/arm/boot/dts/exynos5420-smdk5420.dts
+++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts
@@ -31,6 +31,39 @@
                };
        };
 
+       mmc@12200000 {
+               status = "okay";
+               broken-cd;
+               supports-highspeed;
+               card-detect-delay = <200>;
+               samsung,dw-mshc-ciu-div = <3>;
+               samsung,dw-mshc-sdr-timing = <0 4>;
+               samsung,dw-mshc-ddr-timing = <0 2>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
+
+               slot@0 {
+                       reg = <0>;
+                       bus-width = <8>;
+               };
+       };
+
+       mmc@12220000 {
+               status = "okay";
+               supports-highspeed;
+               card-detect-delay = <200>;
+               samsung,dw-mshc-ciu-div = <3>;
+               samsung,dw-mshc-sdr-timing = <2 3>;
+               samsung,dw-mshc-ddr-timing = <1 2>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
+
+               slot@0 {
+                       reg = <0>;
+                       bus-width = <4>;
+               };
+       };
+
        dp-controller@145B0000 {
                pinctrl-names = "default";
                pinctrl-0 = <&dp_hpd>;

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 09aa06c..3ac3afe 100644 (file)
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -22,6 +22,9 @@
        compatible = "samsung,exynos5420";
 
        aliases {
+               mshc0 = &mmc_0;
+               mshc1 = &mmc_1;
+               mshc2 = &mmc_2;
                pinctrl0 = &pinctrl_0;
                pinctrl1 = &pinctrl_1;
                pinctrl2 = &pinctrl_2;
@@ -88,6 +91,42 @@
                clock-names = "mfc";
        };
 
+       mmc_0: mmc@12200000 {
+               compatible = "samsung,exynos5420-dw-mshc-smu";
+               interrupts = <0 75 0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x12200000 0x2000>;
+               clocks = <&clock 351>, <&clock 132>;
+               clock-names = "biu", "ciu";
+               fifo-depth = <0x40>;
+               status = "disabled";
+       };
+
+       mmc_1: mmc@12210000 {
+               compatible = "samsung,exynos5420-dw-mshc-smu";
+               interrupts = <0 76 0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x12210000 0x2000>;
+               clocks = <&clock 352>, <&clock 133>;
+               clock-names = "biu", "ciu";
+               fifo-depth = <0x40>;
+               status = "disabled";
+       };
+
+       mmc_2: mmc@12220000 {
+               compatible = "samsung,exynos5420-dw-mshc";
+               interrupts = <0 77 0>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x12220000 0x1000>;
+               clocks = <&clock 353>, <&clock 134>;
+               clock-names = "biu", "ciu";
+               fifo-depth = <0x40>;
+               status = "disabled";
+       };
+
        mct@101C0000 {
                compatible = "samsung,exynos4210-mct";
                reg = <0x101C0000 0x800>;