(madsi): Don't use '+' constraint in a clobber.

(madsi_highpart, umadsi_highpart): Delete.

From-SVN: r9058

diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index ee7fa8e..73e44b6 100644 (file)
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -1023,47 +1023,13 @@
        (plus:SI (mult:SI (match_operand:SI 1 "register_operand" "d")
                          (match_operand:SI 2 "register_operand" "d"))
                 (match_dup 0)))
-   (clobber (match_scratch:SI 3 "+h"))]
-  "TARGET_MAD"
-  "mad\\t%1,%2"
-  [(set_attr "type"    "imul")
-   (set_attr "mode"    "SI")
-   (set_attr "length"   "1")])
-
-(define_insn "madsi_highpart"
-  [(set (match_operand:SI 0 "register_operand" "+h")
-       (plus:SI (truncate:SI
-                 (lshiftrt:DI
-                  (mult:DI (sign_extend:DI
-                            (match_operand:SI 1 "register_operand" "d"))
-                           (sign_extend:DI
-                            (match_operand:SI 2 "register_operand" "d")))
-                  (const_int 32)))
-                (match_dup 0)))
-   (clobber (match_scratch:SI 3 "+l"))]
+   (clobber (match_scratch:SI 3 "=h"))]
   "TARGET_MAD"
   "mad\\t%1,%2"
   [(set_attr "type"    "imul")
    (set_attr "mode"    "SI")
    (set_attr "length"   "1")])
 
-(define_insn "umadsi_highpart"
-  [(set (match_operand:SI 0 "register_operand" "+h")
-       (plus:SI (truncate:SI
-                 (lshiftrt:DI
-                  (mult:DI (zero_extend:DI
-                            (match_operand:SI 1 "register_operand" "d"))
-                           (zero_extend:DI
-                            (match_operand:SI 2 "register_operand" "d")))
-                  (const_int 32)))
-                (match_dup 0)))
-   (clobber (match_scratch:SI 3 "+l"))]
-  "TARGET_MAD"
-  "madu\\t%1,%2"
-  [(set_attr "type"    "imul")
-   (set_attr "mode"    "SI")
-   (set_attr "length"   "1")])
-
 ;; ??? We can only refer to HI/LO as a register pair when not
 ;; compiling 64 bit code.  That's because we don't know how to extract
 ;; the two 32 bit values into a single 64 bit register.