ARM: zynq: Wire single qspi on couple of boards
authorMichal Simek <michal.simek@xilinx.com>
Fri, 6 Aug 2021 11:30:19 +0000 (13:30 +0200)
committerMichal Simek <michal.simek@xilinx.com>
Thu, 26 Aug 2021 06:08:11 +0000 (08:08 +0200)
Single configuration is working fine and no issue to enable it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arch/arm/dts/zynq-zc702.dts
arch/arm/dts/zynq-zc706.dts
arch/arm/dts/zynq-zc770-xm010.dts
arch/arm/dts/zynq-zc770-xm013.dts

index 57a47409b91531faf507036be644dd7795d4d75b..f2e05a55b95853ea705fb869af20c01c852f0c00 100644 (file)
 &qspi {
        u-boot,dm-pre-reloc;
        status = "okay";
+       num-cs = <1>;
+       flash@0 {
+               compatible = "n25q128a11", "jedec,spi-nor";
+               reg = <0x0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <4>;
+               spi-max-frequency = <50000000>;
+       };
 };
 
 &sdhci0 {
index 87308c0333d3203425063059634d423345332754..cb919e40533e4a4d7785449ae536e6c9616d65a4 100644 (file)
 &qspi {
        u-boot,dm-pre-reloc;
        status = "okay";
+       num-cs = <1>;
+       flash@0 {
+               compatible = "n25q128a11", "jedec,spi-nor";
+               reg = <0x0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <4>;
+               spi-max-frequency = <50000000>;
+       };
 };
 
 &sdhci0 {
index c547d7921d9ce35ca1fd04fa6d1f5c2533fa35c0..002ff9f7f4891c0414f3f3ae93760db22bdc3a83 100644 (file)
 
 &qspi {
        status = "okay";
+       num-cs = <1>;
+       flash@0 {
+               compatible = "n25q128a11", "jedec,spi-nor";
+               reg = <0x0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <4>;
+               spi-max-frequency = <50000000>;
+       };
 };
 
 &sdhci0 {
index 7218ee3ad8ef1b4dd831e92f7979ec87e0037133..455c8a96105715a06fe577d29346e771957f7ea8 100644 (file)
 
 &qspi {
        status = "okay";
+       num-cs = <1>;
+       flash@0 {
+               compatible = "n25q128a11", "jedec,spi-nor";
+               reg = <0x0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <4>;
+               spi-max-frequency = <50000000>;
+       };
 };
 
 &spi0 {