ARM: zynq: Wire single qspi on couple of boards
authorMichal Simek <michal.simek@xilinx.com>
Fri, 6 Aug 2021 11:30:19 +0000 (13:30 +0200)
committerMichal Simek <michal.simek@xilinx.com>
Thu, 26 Aug 2021 06:08:11 +0000 (08:08 +0200)
Single configuration is working fine and no issue to enable it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arch/arm/dts/zynq-zc702.dts
arch/arm/dts/zynq-zc706.dts
arch/arm/dts/zynq-zc770-xm010.dts
arch/arm/dts/zynq-zc770-xm013.dts

index 57a4740..f2e05a5 100644 (file)
 &qspi {
        u-boot,dm-pre-reloc;
        status = "okay";
+       num-cs = <1>;
+       flash@0 {
+               compatible = "n25q128a11", "jedec,spi-nor";
+               reg = <0x0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <4>;
+               spi-max-frequency = <50000000>;
+       };
 };
 
 &sdhci0 {
index 87308c0..cb919e4 100644 (file)
 &qspi {
        u-boot,dm-pre-reloc;
        status = "okay";
+       num-cs = <1>;
+       flash@0 {
+               compatible = "n25q128a11", "jedec,spi-nor";
+               reg = <0x0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <4>;
+               spi-max-frequency = <50000000>;
+       };
 };
 
 &sdhci0 {
index c547d79..002ff9f 100644 (file)
 
 &qspi {
        status = "okay";
+       num-cs = <1>;
+       flash@0 {
+               compatible = "n25q128a11", "jedec,spi-nor";
+               reg = <0x0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <4>;
+               spi-max-frequency = <50000000>;
+       };
 };
 
 &sdhci0 {
index 7218ee3..455c8a9 100644 (file)
 
 &qspi {
        status = "okay";
+       num-cs = <1>;
+       flash@0 {
+               compatible = "n25q128a11", "jedec,spi-nor";
+               reg = <0x0>;
+               spi-tx-bus-width = <1>;
+               spi-rx-bus-width = <4>;
+               spi-max-frequency = <50000000>;
+       };
 };
 
 &spi0 {