arm64: dts: Update cache properties for hisilicon

The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The 'cache-unified' property should be present if one of the
properties for unified cache is present ('cache-size', ...).

Update the Device Trees accordingly.

Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 8343d0c..a57f35e 100644 (file)
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -203,10 +203,12 @@
 
                A53_L2: l2-cache0 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
 
                A73_L2: l2-cache1 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
        };
 

diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index ae0a7cf..f6d3202 100644 (file)
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -186,10 +186,12 @@
 
                CLUSTER0_L2: l2-cache0 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
 
                CLUSTER1_L2: l2-cache1 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
        };
 

diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
index 7b2abd1..5b2b1bf 100644 (file)
--- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
@@ -211,18 +211,22 @@
 
                cluster0_l2: l2-cache0 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
 
                cluster1_l2: l2-cache1 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
 
                cluster2_l2: l2-cache2 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
 
                cluster3_l2: l2-cache3 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
        };
 

diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
index 2f8b03b..291c2ee 100644 (file)
--- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
@@ -211,18 +211,22 @@
 
                cluster0_l2: l2-cache0 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
 
                cluster1_l2: l2-cache1 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
 
                cluster2_l2: l2-cache2 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
 
                cluster3_l2: l2-cache3 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
        };
 

diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
index 1a16662..b8746fb 100644 (file)
--- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
@@ -842,66 +842,82 @@
 
                cluster0_l2: l2-cache0 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
 
                cluster1_l2: l2-cache1 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
 
                cluster2_l2: l2-cache2 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
 
                cluster3_l2: l2-cache3 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
 
                cluster4_l2: l2-cache4 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
 
                cluster5_l2: l2-cache5 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
 
                cluster6_l2: l2-cache6 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
 
                cluster7_l2: l2-cache7 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
 
                cluster8_l2: l2-cache8 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
 
                cluster9_l2: l2-cache9 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
 
                cluster10_l2: l2-cache10 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
 
                cluster11_l2: l2-cache11 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
 
                cluster12_l2: l2-cache12 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
 
                cluster13_l2: l2-cache13 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
 
                cluster14_l2: l2-cache14 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
 
                cluster15_l2: l2-cache15 {
                        compatible = "cache";
+                       cache-level = <2>;
                };
        };