arm64: dts: mediatek: cherry: Enable MT6360 sub-pmic on I2C7

All devices of the Cherry platform have a MT6360 sub-pmic,
providing two LDOs. Add the required node to enable the PMIC
but without regulators yet, as these will be added in a
later commit.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20220704101321.44835-10-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
index f68d8ff..c07d3ac 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
@@ -161,6 +161,18 @@
        clock-frequency = <400000>;
        pinctrl-names = "default";
        pinctrl-0 = <&i2c7_pins>;
+
+       pmic@34 {
+               #interrupt-cells = <1>;
+               compatible = "mediatek,mt6360";
+               reg = <0x34>;
+               interrupt-controller;
+               interrupts-extended = <&pio 130 IRQ_TYPE_EDGE_FALLING>;
+               interrupt-names = "IRQB";
+               pinctrl-names = "default";
+               pinctrl-0 = <&subpmic_default>;
+               wakeup-source;
+       };
 };
 
 &mmc0 {
@@ -558,6 +570,14 @@
                        bias-pull-down;
                };
        };
+
+       subpmic_default: subpmic-default-pins {
+               subpmic_pin_irq: pins-subpmic-int-n {
+                       pinmux = <PINMUX_GPIO130__FUNC_GPIO130>;
+                       input-enable;
+                       bias-pull-up;
+               };
+       };
 };
 
 &pmic {