a TargetMachine since the only thing it wants is DataLayout.
llvm-svn: 210366
const DataLayout *getDataLayout() const { return DL; }
public:
- explicit TargetSelectionDAGInfo(const TargetMachine &TM);
+ explicit TargetSelectionDAGInfo(const DataLayout *DL);
virtual ~TargetSelectionDAGInfo();
/// EmitTargetCodeForMemcpy - Emit target-specific code that performs a
#include "llvm/Target/TargetMachine.h"
using namespace llvm;
-TargetSelectionDAGInfo::TargetSelectionDAGInfo(const TargetMachine &TM)
- : DL(TM.getDataLayout()) {
+TargetSelectionDAGInfo::TargetSelectionDAGInfo(const DataLayout *DL)
+ : DL(DL) {
}
TargetSelectionDAGInfo::~TargetSelectionDAGInfo() {
#define DEBUG_TYPE "aarch64-selectiondag-info"
AArch64SelectionDAGInfo::AArch64SelectionDAGInfo(const TargetMachine &TM)
- : TargetSelectionDAGInfo(TM),
+ : TargetSelectionDAGInfo(TM.getDataLayout()),
Subtarget(&TM.getSubtarget<AArch64Subtarget>()) {}
AArch64SelectionDAGInfo::~AArch64SelectionDAGInfo() {}
#define DEBUG_TYPE "arm-selectiondag-info"
ARMSelectionDAGInfo::ARMSelectionDAGInfo(const TargetMachine &TM)
- : TargetSelectionDAGInfo(TM),
- Subtarget(&TM.getSubtarget<ARMSubtarget>()) {
-}
+ : TargetSelectionDAGInfo(TM.getDataLayout()),
+ Subtarget(&TM.getSubtarget<ARMSubtarget>()) {}
ARMSelectionDAGInfo::~ARMSelectionDAGInfo() {
}
bool llvm::flag_aligned_memcpy;
-HexagonSelectionDAGInfo::HexagonSelectionDAGInfo(const HexagonTargetMachine
- &TM)
- : TargetSelectionDAGInfo(TM) {
-}
+HexagonSelectionDAGInfo::HexagonSelectionDAGInfo(const HexagonTargetMachine &TM)
+ : TargetSelectionDAGInfo(TM.getDataLayout()) {}
HexagonSelectionDAGInfo::~HexagonSelectionDAGInfo() {
}
#define DEBUG_TYPE "msp430-selectiondag-info"
MSP430SelectionDAGInfo::MSP430SelectionDAGInfo(const MSP430TargetMachine &TM)
- : TargetSelectionDAGInfo(TM) {
-}
+ : TargetSelectionDAGInfo(TM.getDataLayout()) {}
MSP430SelectionDAGInfo::~MSP430SelectionDAGInfo() {
}
#define DEBUG_TYPE "mips-selectiondag-info"
MipsSelectionDAGInfo::MipsSelectionDAGInfo(const MipsTargetMachine &TM)
- : TargetSelectionDAGInfo(TM) {
-}
+ : TargetSelectionDAGInfo(TM.getDataLayout()) {}
MipsSelectionDAGInfo::~MipsSelectionDAGInfo() {
}
CodeGenOpt::Level OL, bool is64bit)
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
Subtarget(TT, CPU, FS, is64bit), DL(computeDataLayout(Subtarget)),
- InstrInfo(*this), TLInfo(*this), TSInfo(*this),
+ InstrInfo(*this), TLInfo(*this), TSInfo(&DL),
FrameLowering(
*this, is64bit) /*FrameInfo(TargetFrameInfo::StackGrowsUp, 8, 0)*/ {
initAsmInfo();
#define DEBUG_TYPE "powerpc-selectiondag-info"
PPCSelectionDAGInfo::PPCSelectionDAGInfo(const PPCTargetMachine &TM)
- : TargetSelectionDAGInfo(TM) {
+ : TargetSelectionDAGInfo(TM.getDataLayout()) {
}
PPCSelectionDAGInfo::~PPCSelectionDAGInfo() {
#define DEBUG_TYPE "sparc-selectiondag-info"
SparcSelectionDAGInfo::SparcSelectionDAGInfo(const SparcTargetMachine &TM)
- : TargetSelectionDAGInfo(TM) {
+ : TargetSelectionDAGInfo(TM.getDataLayout()) {
}
SparcSelectionDAGInfo::~SparcSelectionDAGInfo() {
SystemZSelectionDAGInfo::
SystemZSelectionDAGInfo(const SystemZTargetMachine &TM)
- : TargetSelectionDAGInfo(TM) {
+ : TargetSelectionDAGInfo(TM.getDataLayout()) {
}
SystemZSelectionDAGInfo::~SystemZSelectionDAGInfo() {
#define DEBUG_TYPE "x86-selectiondag-info"
X86SelectionDAGInfo::X86SelectionDAGInfo(const X86TargetMachine &TM) :
- TargetSelectionDAGInfo(TM),
+ TargetSelectionDAGInfo(TM.getDataLayout()),
Subtarget(&TM.getSubtarget<X86Subtarget>()),
TLI(*TM.getTargetLowering()) {
}
#define DEBUG_TYPE "xcore-selectiondag-info"
XCoreSelectionDAGInfo::XCoreSelectionDAGInfo(const XCoreTargetMachine &TM)
- : TargetSelectionDAGInfo(TM) {
-}
+ : TargetSelectionDAGInfo(TM.getDataLayout()) {}
XCoreSelectionDAGInfo::~XCoreSelectionDAGInfo() {
}