net/mlx5: Introduce tunnel entropy control in PCMR register
authorEli Britstein <elibr@mellanox.com>
Sun, 20 Jan 2019 20:33:19 +0000 (22:33 +0200)
committerSaeed Mahameed <saeedm@mellanox.com>
Fri, 22 Feb 2019 21:38:23 +0000 (13:38 -0800)
When using the device packet encapsulation offload, the device
calculates an entropy value, representing the inner packet headers. The
entropy field is placed inside the outer packet headers. For UDP-type
encapsulations, the entropy is placed in the source port field of the
UDP header. For GRE-type encapsulations, the entropy is placed in the 8
LSB of the key field in the GRE header. If the device does not recognize
the encapsulation type, the entropy is not placed in the packet.

Entropy setting can be controlled using PCMR register. if encapsulation
offload is not used force_entropy_cap should be set to 0x0. Entropy
setting is enabled/disabled using entropy_calc, and could be
additionally enabled/disabled for GRE encapsulation by entropy_gre_calc.

As a pre-step to automatically control the tunnel entropy, introduce
the entropy fields in the PCMR register with no functional change.

Signed-off-by: Eli Britstein <elibr@mellanox.com>
Reviewed-by: Oz Shlomo <ozsh@mellanox.com>
Reviewed-by: Roi Dayan <roid@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
include/linux/mlx5/mlx5_ifc.h

index b7bb774..3b83288 100644 (file)
@@ -8473,9 +8473,17 @@ struct mlx5_ifc_pamp_reg_bits {
 struct mlx5_ifc_pcmr_reg_bits {
        u8         reserved_at_0[0x8];
        u8         local_port[0x8];
-       u8         reserved_at_10[0x2e];
+       u8         reserved_at_10[0x10];
+       u8         entropy_force_cap[0x1];
+       u8         entropy_calc_cap[0x1];
+       u8         entropy_gre_calc_cap[0x1];
+       u8         reserved_at_23[0x1b];
        u8         fcs_cap[0x1];
-       u8         reserved_at_3f[0x1f];
+       u8         reserved_at_3f[0x1];
+       u8         entropy_force[0x1];
+       u8         entropy_calc[0x1];
+       u8         entropy_gre_calc[0x1];
+       u8         reserved_at_43[0x1b];
        u8         fcs_chk[0x1];
        u8         reserved_at_5f[0x1];
 };