crypto/fsl: support newer SEC modules

Since Era 10, the version registers changed. Add the version registers
and use them on newer modules.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>

diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c
index bbdbcb8..5275c50 100644 (file)
--- a/drivers/crypto/fsl/jr.c
+++ b/drivers/crypto/fsl/jr.c
@@ -498,9 +498,17 @@ static int instantiate_rng(uint8_t sec_idx)
 static u8 get_rng_vid(uint8_t sec_idx)
 {
        ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx);
-       u32 cha_vid = sec_in32(&sec->chavid_ls);
+       u8 vid;
 
-       return (cha_vid & SEC_CHAVID_RNG_LS_MASK) >> SEC_CHAVID_LS_RNG_SHIFT;
+       if (caam_get_era() < 10) {
+               vid = (sec_in32(&sec->chavid_ls) & SEC_CHAVID_RNG_LS_MASK)
+                      >> SEC_CHAVID_LS_RNG_SHIFT;
+       } else {
+               vid = (sec_in32(&sec->vreg.rng) & CHA_VER_VID_MASK)
+                      >> CHA_VER_VID_SHIFT;
+       }
+
+       return vid;
 }
 
 /*

diff --git a/include/fsl_sec.h b/include/fsl_sec.h
index 2ebb75c..8dce0bb 100644 (file)
--- a/include/fsl_sec.h
+++ b/include/fsl_sec.h
@@ -73,6 +73,41 @@ struct rng4tst {
        u32 rsvd2[15];
 };
 
+/* Version registers (Era 10+) */
+struct version_regs {
+       u32 crca;       /* CRCA_VERSION */
+       u32 afha;       /* AFHA_VERSION */
+       u32 kfha;       /* KFHA_VERSION */
+       u32 pkha;       /* PKHA_VERSION */
+       u32 aesa;       /* AESA_VERSION */
+       u32 mdha;       /* MDHA_VERSION */
+       u32 desa;       /* DESA_VERSION */
+       u32 snw8a;      /* SNW8A_VERSION */
+       u32 snw9a;      /* SNW9A_VERSION */
+       u32 zuce;       /* ZUCE_VERSION */
+       u32 zuca;       /* ZUCA_VERSION */
+       u32 ccha;       /* CCHA_VERSION */
+       u32 ptha;       /* PTHA_VERSION */
+       u32 rng;        /* RNG_VERSION */
+       u32 trng;       /* TRNG_VERSION */
+       u32 aaha;       /* AAHA_VERSION */
+       u32 rsvd[10];
+       u32 sr;         /* SR_VERSION */
+       u32 dma;        /* DMA_VERSION */
+       u32 ai;         /* AI_VERSION */
+       u32 qi;         /* QI_VERSION */
+       u32 jr;         /* JR_VERSION */
+       u32 deco;       /* DECO_VERSION */
+};
+
+#define CHA_VER_NUM_MASK       0x000000ff
+#define CHA_VER_MISC_SHIFT     8
+#define CHA_VER_MISC_MASK      0x0000ff00
+#define CHA_VER_REV_SHIFT      16
+#define CHA_VER_REV_MASK       0x00ff0000
+#define CHA_VER_VID_SHIFT      24
+#define CHA_VER_VID_MASK       0xff000000
+
 typedef struct ccsr_sec {
        u32     res0;
        u32     mcfgr;          /* Master CFG Register */
@@ -98,17 +133,19 @@ typedef struct ccsr_sec {
        u32     drr;            /* DECO Reset Register */
        u8      res5[0x4d8];
        struct rng4tst rng;     /* RNG Registers */
-       u8      res6[0x8a0];
+       u8      res6[0x780];
+       struct version_regs vreg; /* version registers since era 10 */
+       u8      res7[0xa0];
        u32     crnr_ms;        /* CHA Revision Number Register, MS */
        u32     crnr_ls;        /* CHA Revision Number Register, LS */
        u32     ctpr_ms;        /* Compile Time Parameters Register, MS */
        u32     ctpr_ls;        /* Compile Time Parameters Register, LS */
-       u8      res7[0x10];
+       u8      res8[0x10];
        u32     far_ms;         /* Fault Address Register, MS */
        u32     far_ls;         /* Fault Address Register, LS */
        u32     falr;           /* Fault Address LIODN Register */
        u32     fadr;           /* Fault Address Detail Register */
-       u8      res8[0x4];
+       u8      res9[0x4];
        u32     csta;           /* CAAM Status Register */
        u32     smpart;         /* Secure Memory Partition Parameters */
        u32     smvid;          /* Secure Memory Version ID */
@@ -121,16 +158,16 @@ typedef struct ccsr_sec {
        u32     secvid_ms;      /* SEC Version ID Register, MS */
        u32     secvid_ls;      /* SEC Version ID Register, LS */
 #if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3)
-       u8      res9[0x6f020];
+       u8      res10[0x6f020];
 #else
-       u8      res9[0x6020];
+       u8      res10[0x6020];
 #endif
        u32     qilcr_ms;       /* Queue Interface LIODN CFG Register, MS */
        u32     qilcr_ls;       /* Queue Interface LIODN CFG Register, LS */
 #if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3)
-       u8      res10[0x8ffd8];
+       u8      res11[0x8ffd8];
 #else
-       u8      res10[0x8fd8];
+       u8      res11[0x8fd8];
 #endif
 } ccsr_sec_t;