case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
if (ret) {
uint32_t *max_compute_units = ret;
- *max_compute_units = rscreen->info.max_compute_units;
+ *max_compute_units = rscreen->info.num_good_compute_units;
}
return sizeof(uint32_t);
printf("gart_size = %i MB\n", (int)(rscreen->info.gart_size >> 20));
printf("vram_size = %i MB\n", (int)(rscreen->info.vram_size >> 20));
printf("max_sclk = %i\n", rscreen->info.max_sclk);
- printf("max_compute_units = %i\n", rscreen->info.max_compute_units);
+ printf("num_good_compute_units = %i\n", rscreen->info.num_good_compute_units);
printf("max_se = %i\n", rscreen->info.max_se);
printf("max_sh_per_se = %i\n", rscreen->info.max_sh_per_se);
printf("drm = %i.%i.%i\n", rscreen->info.drm_major,
uint64_t gart_size;
uint64_t vram_size;
uint32_t max_sclk;
- uint32_t max_compute_units;
+ uint32_t num_good_compute_units;
uint32_t max_se;
uint32_t max_sh_per_se;
/* Compute the scratch buffer size using the maximum number of waves.
* This way we don't need to recompute it for each kernel launch. */
- unsigned scratch_waves = 32 * sctx->screen->b.info.max_compute_units;
+ unsigned scratch_waves = 32 * sctx->screen->b.info.num_good_compute_units;
for (i = 0; i < program->shader.binary.global_symbol_count; i++) {
unsigned offset =
program->shader.binary.global_symbol_offsets[i];
num_waves_for_scratch =
MIN2(num_waves_for_scratch,
- 32 * sctx->screen->b.info.max_compute_units);
+ 32 * sctx->screen->b.info.num_good_compute_units);
si_pm4_set_reg(pm4, R_00B860_COMPUTE_TMPRING_SIZE,
/* The maximum value for WAVES is 32 * num CU.
* If you program this value incorrectly, the GPU will hang if
* this for non-cs shaders. Using the wrong value here can result in
* GPU lockups, but the maximum value seems to always work.
*/
- sctx->scratch_waves = 32 * sscreen->b.info.max_compute_units;
+ sctx->scratch_waves = 32 * sscreen->b.info.num_good_compute_units;
#if HAVE_LLVM >= 0x0306
/* Initialize LLVM TargetMachine */
for (j = 0; j < ws->info.max_sh_per_se; j++) {
unsigned max = util_last_bit(ws->amdinfo.cu_bitmap[i][j]);
- if (ws->info.max_compute_units < max)
- ws->info.max_compute_units = max;
+ if (ws->info.num_good_compute_units < max)
+ ws->info.num_good_compute_units = max;
}
- ws->info.max_compute_units *= ws->info.max_se * ws->info.max_sh_per_se;
+ ws->info.num_good_compute_units *= ws->info.max_se * ws->info.max_sh_per_se;
memcpy(ws->info.si_tile_mode_array, ws->amdinfo.gb_tile_mode,
sizeof(ws->amdinfo.gb_tile_mode));
&ws->info.r600_max_pipes);
/* All GPUs have at least one compute unit */
- ws->info.max_compute_units = 1;
+ ws->info.num_good_compute_units = 1;
radeon_get_drm_value(ws->fd, RADEON_INFO_ACTIVE_CU_COUNT, NULL,
- &ws->info.max_compute_units);
+ &ws->info.num_good_compute_units);
radeon_get_drm_value(ws->fd, RADEON_INFO_MAX_SE, NULL,
&ws->info.max_se);