pan/mdg: prevent csel_v from being scheduled alongside writeout

Midgard writeout arguments need to be written to in the same bundle the
writeout happens.  Both csel, csel_v and their float variants also
require their conditional to be performed on the same bundle.

This patch prevents scheduling csel the same bundle as a writeout,
fixing the scheduling issue.

But... there's still room for optimizations since in some cases it might
be possible to fit all these instructions in the same bundle.

No shader-db changes.

Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9340>

diff --git a/src/panfrost/midgard/midgard_schedule.c b/src/panfrost/midgard/midgard_schedule.c
index 438325e..615bc45 100644 (file)
--- a/src/panfrost/midgard/midgard_schedule.c
+++ b/src/panfrost/midgard/midgard_schedule.c
@@ -1165,15 +1165,18 @@ mir_schedule_alu(
                 sadd->inline_constant = branch->constants.u32[0];
                 branch->src[1] = sadd->dest;
                 branch->src_types[1] = sadd->dest_type;
-
-                /* Mask off any conditionals. Could be optimized to just scalar
-                 * conditionals TODO */
-                predicate.no_cond = true;
         }
 
         if (writeout) {
                 /* Propagate up */
                 bundle.last_writeout = branch->last_writeout;
+
+                /* Mask off any conditionals.
+                 * This prevents csel and csel_v being scheduled into smul
+                 * since we might not have room for a conditional in vmul/sadd.
+                 * This is important because both writeout and csel have same-bundle
+                 * requirements on their dependencies. */
+                predicate.no_cond = true;
         }
 
         /* When MRT is in use, writeout loops require r1.w to be filled (with a