* limitations under the License.
*/
+// For CLKernelLibraryEx initialization
+#include "arm_compute/core/CL/CLHelpers.h"
+#include "arm_compute/core/CL/CLKernelLibrary.h"
+#include "arm_compute/core/CL/CLKernelLibraryEx.h"
+
#include <arm_compute/runtime/CL/CLScheduler.h>
#include "backend/acl_cl/Config.h"
namespace acl_cl
{
-void Config::initialize() { arm_compute::CLScheduler::get().default_init(); }
+void Config::initialize()
+{
+ arm_compute::CLScheduler::get().default_init();
+ // NOTE CLKernelLibraryEx must use the same context as CLScheduler
+ // It did not check whether another device is available.
+ arm_compute::CLKernelLibraryEx::get().init(
+ "./cl_kernels/", arm_compute::CLScheduler::get().context(), cl::Device::getDefault());
+}
} // namespace acl_cl
} // namespace backend
#include <arm_compute/runtime/misc/functions/GenericFullyConnectedLayer.h>
#include <arm_compute/runtime/CL/functions/CLStridedSlice.h>
#include <arm_compute/runtime/CL/functions/CLPixelWiseMultiplication.h>
+#include <arm_compute/runtime/CL/functions/CLCast.h>
#include "kernel/ConcatLayer.h"
// DO NOTHING
}
+void StageGenerator::visit(const model::operation::CastNode &node)
+{
+ const auto ofm_index{node.getOutputs().at(0)};
+ const auto ifm_index{node.getInputs().at(model::operation::CastNode::Input::INPUT)};
+
+ // Construct operation parameters
+ struct Param
+ {
+ model::operand::Index ofm_index;
+ model::operand::Index ifm_index;
+ };
+
+ Param param;
+
+ param.ofm_index = ofm_index;
+ param.ifm_index = ifm_index;
+
+ auto tensors = _tensor_builder;
+
+ returnStage([tensors, param](IExecutionBuilder &builder) {
+ auto ofm_alloc = tensors->at(param.ofm_index).get();
+ auto ifm_alloc = tensors->at(param.ifm_index).get();
+
+ std::unique_ptr<::arm_compute::IFunction> fn;
+
+ auto l = make_layer<::arm_compute::CLCast>();
+
+ l->configure(ifm_alloc->handle(), ofm_alloc->handle());
+
+ fn = std::move(l);
+
+ auto acl_fn = make_cl_function(std::move(fn));
+
+ builder.append(std::move(acl_fn));
+
+ });
+}
+
void StageGenerator::visit(const model::operation::Conv2DNode &node)
{
using model::operation::Conv2DNode;
// DO NOTHING
}
+void StageGenerator::visit(const model::operation::CastNode &)
+{
+ throw std::runtime_error("CastNode for cpu is not implemented yet.");
+}
+
void StageGenerator::visit(const model::operation::Conv2DNode &node)
{
using model::operation::Conv2DNode;
namespace compiler
{
+void OperationValidator::visit(const model::operation::CastNode &node)
+{
+ const auto output_index{node.getOutputs().at(0)};
+ const auto input_index{node.getInputs().at(0)};
+
+ UNUSED_RELEASE(output_index);
+ UNUSED_RELEASE(input_index);
+
+ assert(_ctx.at(output_index).shape() == _ctx.at(input_index).shape());
+}
+
void OperationValidator::visit(const model::operation::Conv2DNode &)
{
// DO NOTHING
return ANEURALNETWORKS_BAD_STATE;
}
- const ANeuralNetworksOperationTypeEx FIRST_OPERATION = ANEURALNETWORKS_GATHER_EX;
+ const ANeuralNetworksOperationTypeEx FIRST_OPERATION = ANEURALNETWORKS_CAST_EX;
const ANeuralNetworksOperationTypeEx LAST_OPERATION = ANEURALNETWORKS_PRELU_EX;
if ((type < FIRST_OPERATION) || (type > LAST_OPERATION))
{
{
using namespace neurun::model;
+ _map[ANEURALNETWORKS_CAST_EX] = [](const OperationFactory::Param &init_param) {
+ assert(init_param.input_count == 1 && init_param.output_count == 1);
+
+ operand::IndexSet outputs{init_param.outputs[0]};
+
+ // Each input should be interpreted as follows:
+ // 0 -> input Tensor Index
+ operand::IndexSet inputs{init_param.inputs[0]};
+
+ return new operation::CastNode{inputs, outputs};
+ };
+
_map[ANEURALNETWORKS_CONV_2D] = [](const OperationFactory::Param &init_param) {
using neurun::model::operation::Conv2DNode;
#include "model/operation/Node.h"
#include "NeuralNetworks.h"
+#include "NeuralNetworksEx.h"
/**
* @brief A class to create a neurun operation object from NN API input parameters
return true;
}
-bool ANeuralNetworksModel::addOperationEx(ANeuralNetworksOperationTypeEx type, uint32_t,
- const uint32_t *, uint32_t outputCount,
+bool ANeuralNetworksModel::addOperationEx(ANeuralNetworksOperationTypeEx type, uint32_t inputCount,
+ const uint32_t *inputs, uint32_t outputCount,
const uint32_t *outputs) noexcept
{
try
const neurun::model::operand::Index ind{outputs[i]};
_model->operands().at(ind).usage(neurun::model::operand::Usage::OPERATION_OUTPUT);
}
+
+ auto &factory = OperationFactory::instance();
+ OperationFactory::Param param{inputCount, inputs, outputCount, outputs};
+
switch (type)
{
+ case ANEURALNETWORKS_CAST_EX:
+ {
+ auto node = factory.create(type, param);
+ _model->addOperation(std::unique_ptr<neurun::model::operation::Node>{node});
+
+ break;
+ }
default:
throw std::runtime_error{"Not supported operation"};
}
--- /dev/null
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "CastNode.h"
+
+#include <cassert>
+
+#include "NodeVisitor.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+void CastNode::accept(NodeVisitor &&v) const { v.visit(*this); }
+
+CastNode::CastNode(const operand::IndexSet &inputs, const operand::IndexSet &outputs)
+ : model::operation::Node{OperandConstraint::createExact(1u), inputs, outputs}
+{
+}
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
--- /dev/null
+/*
+ * Copyright (c) 2019 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __NEURUN_MODEL_OPERATION_CAST_NODE_H__
+#define __NEURUN_MODEL_OPERATION_CAST_NODE_H__
+
+#include "model/operation/Node.h"
+
+namespace neurun
+{
+namespace model
+{
+namespace operation
+{
+
+class CastNode : public model::operation::Node
+{
+public:
+ enum Input
+ {
+ INPUT = 0
+ };
+
+public:
+ CastNode(const operand::IndexSet &inputs, const operand::IndexSet &outputs);
+
+public:
+ virtual void accept(NodeVisitor &&) const override;
+ virtual std::string getName() const override { return "Cast"; }
+};
+
+} // namespace operation
+} // namespace model
+} // namespace neurun
+
+#endif // __NEURUN_MODEL_OPERATION_CAST_NODE_H__
#include "MulNode.h"
#include "TanhNode.h"
#include "LogisticNode.h"
+#include "CastNode.h"
// Internal Name | NN API? | NN API Name
OP(AddNode , true , ADD)
OP(SubNode , true , SUB)
+OP(CastNode , true , CAST_EX)
OP(Conv2DNode , true , CONV_2D)
OP(DepthwiseConv2DNode , true , DEPTHWISECONV_2D)
OP(AvgPool2DNode , true , AVERAGE_POOL_2D)
GeneratedTests.space_to_batch*
GeneratedTests.squeeze*
GeneratedTests.transpose*
-GeneratedTests.cast_ex*
GeneratedTests.gather_ex*
GeneratedTests.tensorflowmax_ex*
GeneratedTests.reduce_sum_ex*
add/1D
add/4D
average_pool_2d
+cast
concat
conv_2d
fullyconnected/fc1
projects / platform / core / ml / nnfw.git / commitdiff