Merge branch 'mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox...
authorJakub Kicinski <kuba@kernel.org>
Thu, 29 Sep 2022 02:20:49 +0000 (19:20 -0700)
committerJakub Kicinski <kuba@kernel.org>
Thu, 29 Sep 2022 02:20:49 +0000 (19:20 -0700)
Saeed Mahameed says:

====================
updates from mlx5-next 2022-09-24

Updates form mlx5-next including[1]:

1) HW definitions and support for NPPS clock settings.

2) various cleanups

3) Enable hash mode by default for all NICs

4) page tracker and advanced virtualization HW definitions for vfio

[1] https://lore.kernel.org/netdev/20220907233636.388475-1-saeed@kernel.org/

* 'mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux:
  net/mlx5: Remove from FPGA IFC file not-needed definitions
  net/mlx5: Remove unused structs
  net/mlx5: Remove unused functions
  net/mlx5: detect and enable bypass port select flow table
  net/mlx5: Lag, enable hash mode by default for all NICs
  net/mlx5: Lag, set active ports if support bypass port select flow table
  RDMA/mlx5: Don't set tx affinity when lag is in hash mode
  net/mlx5: add IFC bits for bypassing port select flow table
  net/mlx5: Add support for NPPS with real time mode
  net/mlx5: Expose NPPS related registers
  net/mlx5: Query ADV_VIRTUALIZATION capabilities
  net/mlx5: Introduce ifc bits for page tracker
  RDMA/mlx5: Move function mlx5_core_query_ib_ppcnt() to mlx5_ib
====================

Link: https://lore.kernel.org/all/20220927201906.234015-1-saeed@kernel.org/
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
1  2 
drivers/infiniband/hw/mlx5/mad.c
drivers/infiniband/hw/mlx5/mlx5_ib.h
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.h
drivers/net/ethernet/mellanox/mlx5/core/fw.c
drivers/net/ethernet/mellanox/mlx5/core/main.c
include/linux/mlx5/device.h
include/linux/mlx5/driver.h
include/linux/mlx5/mlx5_ifc.h

Simple merge
Simple merge
@@@ -273,13 -273,12 +273,19 @@@ int mlx5_query_hca_caps(struct mlx5_cor
                        return err;
        }
  
 +      if (MLX5_CAP_GEN_64(dev, general_obj_types) &
 +          MLX5_GENERAL_OBJ_TYPES_CAP_MACSEC_OFFLOAD) {
 +              err = mlx5_core_get_caps(dev, MLX5_CAP_MACSEC);
 +              if (err)
 +                      return err;
 +      }
 +
+       if (MLX5_CAP_GEN(dev, adv_virtualization)) {
+               err = mlx5_core_get_caps(dev, MLX5_CAP_ADV_VIRTUALIZATION);
+               if (err)
+                       return err;
+       }
        return 0;
  }
  
@@@ -1507,7 -1522,7 +1541,8 @@@ static const int types[] = 
        MLX5_CAP_IPSEC,
        MLX5_CAP_PORT_SELECTION,
        MLX5_CAP_DEV_SHAMPO,
 +      MLX5_CAP_MACSEC,
+       MLX5_CAP_ADV_VIRTUALIZATION,
  };
  
  static void mlx5_hca_caps_free(struct mlx5_core_dev *dev)
@@@ -1206,9 -1187,9 +1195,10 @@@ enum mlx5_cap_type 
        MLX5_CAP_DEV_EVENT = 0x14,
        MLX5_CAP_IPSEC,
        MLX5_CAP_DEV_SHAMPO = 0x1d,
 +      MLX5_CAP_MACSEC = 0x1f,
        MLX5_CAP_GENERAL_2 = 0x20,
        MLX5_CAP_PORT_SELECTION = 0x25,
+       MLX5_CAP_ADV_VIRTUALIZATION = 0x26,
        /* NUM OF CAP Types */
        MLX5_CAP_NUM
  };
Simple merge
Simple merge