Later patches will add wrapper types for specific classes
of mode. E.g. SImode will be a scalar_int_mode, SFmode will be a
scalar_float_mode, etc. This patch prepares for that change by adding
an E_ prefix to the mode enum values. It also adds #defines that map
the unprefixed names to the prefixed names; e.g:
#define QImode E_QImode
Later patches will change this to use things like scalar_int_mode
where appropriate.
The patch continues to use enum values to initialise static data.
This isn't necessary for correctness, but it cuts down on the amount
of load-time initialisation and shouldn't have any downsides.
The patch also changes things like:
cmp_mode == DImode ? DFmode : DImode
to:
cmp_mode == DImode ? E_DFmode : E_DImode
This is because DImode and DFmode will eventually be different
classes, so the original ?: wouldn't be well-formed.
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* genmodes.c (mode_size_inline): Add an E_ prefix to mode names.
(mode_nunits_inline): Likewise.
(mode_inner_inline): Likewise.
(mode_unit_size_inline): Likewise.
(mode_unit_precision_inline): Likewise.
(emit_insn_modes_h): Likewise. Also emit a #define of the
unprefixed name.
(emit_mode_wider): Add an E_ prefix to mode names.
(emit_mode_complex): Likewise.
(emit_mode_inner): Likewise.
(emit_mode_adjustments): Likewise.
(emit_mode_int_n): Likewise.
* config/aarch64/aarch64-builtins.c (v8qi_UP, v4hi_UP, v4hf_UP)
(v2si_UP, v2sf_UP, v1df_UP, di_UP, df_UP, v16qi_UP, v8hi_UP, v8hf_UP)
(v4si_UP, v4sf_UP, v2di_UP, v2df_UP, ti_UP, oi_UP, ci_UP, xi_UP)
(si_UP, sf_UP, hi_UP, hf_UP, qi_UP): Likewise.
(CRC32_BUILTIN, ENTRY): Likewise.
* config/aarch64/aarch64.c (aarch64_push_regs): Likewise.
(aarch64_pop_regs): Likewise.
(aarch64_process_components): Likewise.
* config/alpha/alpha.c (alpha_emit_conditional_move): Likewise.
* config/arm/arm-builtins.c (v8qi_UP, v4hi_UP, v4hf_UP, v2si_UP)
(v2sf_UP, di_UP, v16qi_UP, v8hi_UP, v8hf_UP, v4si_UP, v4sf_UP)
(v2di_UP, ti_UP, ei_UP, oi_UP, hf_UP, si_UP, void_UP): Likewise.
* config/arm/arm.c (arm_init_libfuncs): Likewise.
* config/i386/i386-builtin-types.awk (ix86_builtin_type_vect_mode):
Likewise.
* config/i386/i386-builtin.def (pcmpestr): Likewise.
(pcmpistr): Likewise.
* config/microblaze/microblaze.c (double_memory_operand): Likewise.
* config/mmix/mmix.c (mmix_output_condition): Likewise.
* config/powerpcspe/powerpcspe.c (rs6000_init_hard_regno_mode_ok):
Likewise.
* config/rl78/rl78.c (mduc_regs): Likewise.
* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Likewise.
(htm_expand_builtin): Likewise.
* config/sh/sh.h (REGISTER_NATURAL_MODE): Likewise.
* config/sparc/sparc.c (emit_save_or_restore_regs): Likewise.
* config/xtensa/xtensa.c (print_operand): Likewise.
* expmed.h (NUM_MODE_PARTIAL_INT): Likewise.
(NUM_MODE_VECTOR_INT): Likewise.
* genoutput.c (null_operand): Likewise.
(output_operand_data): Likewise.
* genrecog.c (print_parameter_value): Likewise.
* lra.c (debug_operand_data): Likewise.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r251452
2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
+ Alan Hayward <alan.hayward@arm.com>
+ David Sherwood <david.sherwood@arm.com>
+
+ * genmodes.c (mode_size_inline): Add an E_ prefix to mode names.
+ (mode_nunits_inline): Likewise.
+ (mode_inner_inline): Likewise.
+ (mode_unit_size_inline): Likewise.
+ (mode_unit_precision_inline): Likewise.
+ (emit_insn_modes_h): Likewise. Also emit a #define of the
+ unprefixed name.
+ (emit_mode_wider): Add an E_ prefix to mode names.
+ (emit_mode_complex): Likewise.
+ (emit_mode_inner): Likewise.
+ (emit_mode_adjustments): Likewise.
+ (emit_mode_int_n): Likewise.
+ * config/aarch64/aarch64-builtins.c (v8qi_UP, v4hi_UP, v4hf_UP)
+ (v2si_UP, v2sf_UP, v1df_UP, di_UP, df_UP, v16qi_UP, v8hi_UP, v8hf_UP)
+ (v4si_UP, v4sf_UP, v2di_UP, v2df_UP, ti_UP, oi_UP, ci_UP, xi_UP)
+ (si_UP, sf_UP, hi_UP, hf_UP, qi_UP): Likewise.
+ (CRC32_BUILTIN, ENTRY): Likewise.
+ * config/aarch64/aarch64.c (aarch64_push_regs): Likewise.
+ (aarch64_pop_regs): Likewise.
+ (aarch64_process_components): Likewise.
+ * config/alpha/alpha.c (alpha_emit_conditional_move): Likewise.
+ * config/arm/arm-builtins.c (v8qi_UP, v4hi_UP, v4hf_UP, v2si_UP)
+ (v2sf_UP, di_UP, v16qi_UP, v8hi_UP, v8hf_UP, v4si_UP, v4sf_UP)
+ (v2di_UP, ti_UP, ei_UP, oi_UP, hf_UP, si_UP, void_UP): Likewise.
+ * config/arm/arm.c (arm_init_libfuncs): Likewise.
+ * config/i386/i386-builtin-types.awk (ix86_builtin_type_vect_mode):
+ Likewise.
+ * config/i386/i386-builtin.def (pcmpestr): Likewise.
+ (pcmpistr): Likewise.
+ * config/microblaze/microblaze.c (double_memory_operand): Likewise.
+ * config/mmix/mmix.c (mmix_output_condition): Likewise.
+ * config/powerpcspe/powerpcspe.c (rs6000_init_hard_regno_mode_ok):
+ Likewise.
+ * config/rl78/rl78.c (mduc_regs): Likewise.
+ * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Likewise.
+ (htm_expand_builtin): Likewise.
+ * config/sh/sh.h (REGISTER_NATURAL_MODE): Likewise.
+ * config/sparc/sparc.c (emit_save_or_restore_regs): Likewise.
+ * config/xtensa/xtensa.c (print_operand): Likewise.
+ * expmed.h (NUM_MODE_PARTIAL_INT): Likewise.
+ (NUM_MODE_VECTOR_INT): Likewise.
+ * genoutput.c (null_operand): Likewise.
+ (output_operand_data): Likewise.
+ * genrecog.c (print_parameter_value): Likewise.
+ * lra.c (debug_operand_data): Likewise.
+
+2017-08-30 Richard Sandiford <richard.sandiford@linaro.org>
* dwarf2out.c (scompare_loc_descriptor_wide)
(scompare_loc_descriptor_narrow): New functions, split out from...
#include "gimple-iterator.h"
#include "case-cfn-macros.h"
-#define v8qi_UP V8QImode
-#define v4hi_UP V4HImode
-#define v4hf_UP V4HFmode
-#define v2si_UP V2SImode
-#define v2sf_UP V2SFmode
-#define v1df_UP V1DFmode
-#define di_UP DImode
-#define df_UP DFmode
-#define v16qi_UP V16QImode
-#define v8hi_UP V8HImode
-#define v8hf_UP V8HFmode
-#define v4si_UP V4SImode
-#define v4sf_UP V4SFmode
-#define v2di_UP V2DImode
-#define v2df_UP V2DFmode
-#define ti_UP TImode
-#define oi_UP OImode
-#define ci_UP CImode
-#define xi_UP XImode
-#define si_UP SImode
-#define sf_UP SFmode
-#define hi_UP HImode
-#define hf_UP HFmode
-#define qi_UP QImode
+#define v8qi_UP E_V8QImode
+#define v4hi_UP E_V4HImode
+#define v4hf_UP E_V4HFmode
+#define v2si_UP E_V2SImode
+#define v2sf_UP E_V2SFmode
+#define v1df_UP E_V1DFmode
+#define di_UP E_DImode
+#define df_UP E_DFmode
+#define v16qi_UP E_V16QImode
+#define v8hi_UP E_V8HImode
+#define v8hf_UP E_V8HFmode
+#define v4si_UP E_V4SImode
+#define v4sf_UP E_V4SFmode
+#define v2di_UP E_V2DImode
+#define v2df_UP E_V2DFmode
+#define ti_UP E_TImode
+#define oi_UP E_OImode
+#define ci_UP E_CImode
+#define xi_UP E_XImode
+#define si_UP E_SImode
+#define sf_UP E_SFmode
+#define hi_UP E_HImode
+#define hf_UP E_HFmode
+#define qi_UP E_QImode
#define UP(X) X##_UP
#define SIMD_MAX_BUILTIN_ARGS 5
#undef CRC32_BUILTIN
#define CRC32_BUILTIN(N, M) \
- {"__builtin_aarch64_"#N, M##mode, CODE_FOR_aarch64_##N, AARCH64_BUILTIN_##N},
+ {"__builtin_aarch64_"#N, E_##M##mode, CODE_FOR_aarch64_##N, AARCH64_BUILTIN_##N},
static aarch64_crc_builtin_datum aarch64_crc_builtin_data[] = {
AARCH64_CRC32_BUILTINS
};
#define ENTRY(E, M, Q, G) \
- {E, "__" #E, #G "__" #E, NULL_TREE, NULL_TREE, M##mode, qualifier_##Q},
+ {E, "__" #E, #G "__" #E, NULL_TREE, NULL_TREE, E_##M##mode, qualifier_##Q},
static struct aarch64_simd_type_info aarch64_simd_types [] = {
#include "aarch64-simd-builtin-types.def"
};
aarch64_push_regs (unsigned regno1, unsigned regno2, HOST_WIDE_INT adjustment)
{
rtx_insn *insn;
- machine_mode mode = (regno1 <= R30_REGNUM) ? DImode : DFmode;
+ machine_mode mode = (regno1 <= R30_REGNUM) ? E_DImode : E_DFmode;
if (regno2 == INVALID_REGNUM)
return aarch64_pushwb_single_reg (mode, regno1, adjustment);
aarch64_pop_regs (unsigned regno1, unsigned regno2, HOST_WIDE_INT adjustment,
rtx *cfi_ops)
{
- machine_mode mode = (regno1 <= R30_REGNUM) ? DImode : DFmode;
+ machine_mode mode = (regno1 <= R30_REGNUM) ? E_DImode : E_DFmode;
rtx reg1 = gen_rtx_REG (mode, regno1);
*cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg1, *cfi_ops);
{
/* AAPCS64 section 5.1.2 requires only the bottom 64 bits to be saved
so DFmode for the vector registers is enough. */
- machine_mode mode = GP_REGNUM_P (regno) ? DImode : DFmode;
+ machine_mode mode = GP_REGNUM_P (regno) ? E_DImode : E_DFmode;
rtx reg = gen_rtx_REG (mode, regno);
HOST_WIDE_INT offset = cfun->machine->frame.reg_offset[regno];
if (!frame_pointer_needed)
emit_insn (gen_rtx_SET (tem, gen_rtx_fmt_ee (cmp_code, cmp_mode,
op0, op1)));
- cmp_mode = cmp_mode == DImode ? DFmode : DImode;
+ cmp_mode = cmp_mode == DImode ? E_DFmode : E_DImode;
op0 = gen_lowpart (cmp_mode, tem);
op1 = CONST0_RTX (cmp_mode);
cmp = gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
qualifier_none, qualifier_struct_load_store_lane_index };
#define STORE1LANE_QUALIFIERS (arm_storestruct_lane_qualifiers)
-#define v8qi_UP V8QImode
-#define v4hi_UP V4HImode
-#define v4hf_UP V4HFmode
-#define v2si_UP V2SImode
-#define v2sf_UP V2SFmode
-#define di_UP DImode
-#define v16qi_UP V16QImode
-#define v8hi_UP V8HImode
-#define v8hf_UP V8HFmode
-#define v4si_UP V4SImode
-#define v4sf_UP V4SFmode
-#define v2di_UP V2DImode
-#define ti_UP TImode
-#define ei_UP EImode
-#define oi_UP OImode
-#define hf_UP HFmode
-#define si_UP SImode
-#define void_UP VOIDmode
+#define v8qi_UP E_V8QImode
+#define v4hi_UP E_V4HImode
+#define v4hf_UP E_V4HFmode
+#define v2si_UP E_V2SImode
+#define v2sf_UP E_V2SFmode
+#define di_UP E_DImode
+#define v16qi_UP E_V16QImode
+#define v8hi_UP E_V8HImode
+#define v8hf_UP E_V8HFmode
+#define v4si_UP E_V4SImode
+#define v4sf_UP E_V4SFmode
+#define v2di_UP E_V2DImode
+#define ti_UP E_TImode
+#define ei_UP E_EImode
+#define oi_UP E_OImode
+#define hf_UP E_HFmode
+#define si_UP E_SImode
+#define void_UP E_VOIDmode
#define UP(X) X##_UP
{
const arm_fixed_mode_set fixed_arith_modes[] =
{
- { QQmode, "qq" },
- { UQQmode, "uqq" },
- { HQmode, "hq" },
- { UHQmode, "uhq" },
- { SQmode, "sq" },
- { USQmode, "usq" },
- { DQmode, "dq" },
- { UDQmode, "udq" },
- { TQmode, "tq" },
- { UTQmode, "utq" },
- { HAmode, "ha" },
- { UHAmode, "uha" },
- { SAmode, "sa" },
- { USAmode, "usa" },
- { DAmode, "da" },
- { UDAmode, "uda" },
- { TAmode, "ta" },
- { UTAmode, "uta" }
+ { E_QQmode, "qq" },
+ { E_UQQmode, "uqq" },
+ { E_HQmode, "hq" },
+ { E_UHQmode, "uhq" },
+ { E_SQmode, "sq" },
+ { E_USQmode, "usq" },
+ { E_DQmode, "dq" },
+ { E_UDQmode, "udq" },
+ { E_TQmode, "tq" },
+ { E_UTQmode, "utq" },
+ { E_HAmode, "ha" },
+ { E_UHAmode, "uha" },
+ { E_SAmode, "sa" },
+ { E_USAmode, "usa" },
+ { E_DAmode, "da" },
+ { E_UDAmode, "uda" },
+ { E_TAmode, "ta" },
+ { E_UTAmode, "uta" }
};
const arm_fixed_mode_set fixed_conv_modes[] =
{
- { QQmode, "qq" },
- { UQQmode, "uqq" },
- { HQmode, "hq" },
- { UHQmode, "uhq" },
- { SQmode, "sq" },
- { USQmode, "usq" },
- { DQmode, "dq" },
- { UDQmode, "udq" },
- { TQmode, "tq" },
- { UTQmode, "utq" },
- { HAmode, "ha" },
- { UHAmode, "uha" },
- { SAmode, "sa" },
- { USAmode, "usa" },
- { DAmode, "da" },
- { UDAmode, "uda" },
- { TAmode, "ta" },
- { UTAmode, "uta" },
- { QImode, "qi" },
- { HImode, "hi" },
- { SImode, "si" },
- { DImode, "di" },
- { TImode, "ti" },
- { SFmode, "sf" },
- { DFmode, "df" }
+ { E_QQmode, "qq" },
+ { E_UQQmode, "uqq" },
+ { E_HQmode, "hq" },
+ { E_UHQmode, "uhq" },
+ { E_SQmode, "sq" },
+ { E_USQmode, "usq" },
+ { E_DQmode, "dq" },
+ { E_UDQmode, "udq" },
+ { E_TQmode, "tq" },
+ { E_UTQmode, "utq" },
+ { E_HAmode, "ha" },
+ { E_UHAmode, "uha" },
+ { E_SAmode, "sa" },
+ { E_USAmode, "usa" },
+ { E_DAmode, "da" },
+ { E_UDAmode, "uda" },
+ { E_TAmode, "ta" },
+ { E_UTAmode, "uta" },
+ { E_QImode, "qi" },
+ { E_HImode, "hi" },
+ { E_SImode, "si" },
+ { E_DImode, "di" },
+ { E_TImode, "ti" },
+ { E_SFmode, "sf" },
+ { E_DFmode, "df" }
};
unsigned int i, j;
printf ",\n "
else
printf ", "
- printf vect_mode[i] "mode"
+ printf "E_" vect_mode[i] "mode"
}
print "\n};\n\n"
BDESC_FIRST (pcmpestr, PCMPESTR,
OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestri128", IX86_BUILTIN_PCMPESTRI128, UNKNOWN, 0)
BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestrm128", IX86_BUILTIN_PCMPESTRM128, UNKNOWN, 0)
-BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestria128", IX86_BUILTIN_PCMPESTRA128, UNKNOWN, (int) CCAmode)
-BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestric128", IX86_BUILTIN_PCMPESTRC128, UNKNOWN, (int) CCCmode)
-BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestrio128", IX86_BUILTIN_PCMPESTRO128, UNKNOWN, (int) CCOmode)
-BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestris128", IX86_BUILTIN_PCMPESTRS128, UNKNOWN, (int) CCSmode)
-BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestriz128", IX86_BUILTIN_PCMPESTRZ128, UNKNOWN, (int) CCZmode)
+BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestria128", IX86_BUILTIN_PCMPESTRA128, UNKNOWN, (int) E_CCAmode)
+BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestric128", IX86_BUILTIN_PCMPESTRC128, UNKNOWN, (int) E_CCCmode)
+BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestrio128", IX86_BUILTIN_PCMPESTRO128, UNKNOWN, (int) E_CCOmode)
+BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestris128", IX86_BUILTIN_PCMPESTRS128, UNKNOWN, (int) E_CCSmode)
+BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestriz128", IX86_BUILTIN_PCMPESTRZ128, UNKNOWN, (int) E_CCZmode)
BDESC_END (PCMPESTR, PCMPISTR)
BDESC_FIRST (pcmpistr, PCMPISTR,
OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistri128", IX86_BUILTIN_PCMPISTRI128, UNKNOWN, 0)
BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistrm128", IX86_BUILTIN_PCMPISTRM128, UNKNOWN, 0)
-BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistria128", IX86_BUILTIN_PCMPISTRA128, UNKNOWN, (int) CCAmode)
-BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistric128", IX86_BUILTIN_PCMPISTRC128, UNKNOWN, (int) CCCmode)
-BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistrio128", IX86_BUILTIN_PCMPISTRO128, UNKNOWN, (int) CCOmode)
-BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistris128", IX86_BUILTIN_PCMPISTRS128, UNKNOWN, (int) CCSmode)
-BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistriz128", IX86_BUILTIN_PCMPISTRZ128, UNKNOWN, (int) CCZmode)
+BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistria128", IX86_BUILTIN_PCMPISTRA128, UNKNOWN, (int) E_CCAmode)
+BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistric128", IX86_BUILTIN_PCMPISTRC128, UNKNOWN, (int) E_CCCmode)
+BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistrio128", IX86_BUILTIN_PCMPISTRO128, UNKNOWN, (int) E_CCOmode)
+BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistris128", IX86_BUILTIN_PCMPISTRS128, UNKNOWN, (int) E_CCSmode)
+BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistriz128", IX86_BUILTIN_PCMPISTRZ128, UNKNOWN, (int) E_CCZmode)
BDESC_END (PCMPISTR, SPECIAL_ARGS)
return 1;
return memory_address_p ((GET_MODE_CLASS (mode) == MODE_INT
- ? SImode : SFmode),
+ ? E_SImode : E_SFmode),
plus_constant (Pmode, addr, 4));
}
#undef CCEND
static const struct cc_type_conv cc_convs[]
- = {{CC_FUNmode, cc_fun_convs},
- {CC_FPmode, cc_fp_convs},
- {CC_FPEQmode, cc_fpeq_convs},
- {CC_UNSmode, cc_uns_convs},
- {CCmode, cc_signed_convs},
- {DImode, cc_di_convs}};
+ = {{E_CC_FUNmode, cc_fun_convs},
+ {E_CC_FPmode, cc_fp_convs},
+ {E_CC_FPEQmode, cc_fpeq_convs},
+ {E_CC_UNSmode, cc_uns_convs},
+ {E_CCmode, cc_signed_convs},
+ {E_DImode, cc_di_convs}};
size_t i;
int j;
};
static const struct fuse_insns addis_insns[] = {
- { SFmode, DImode, RELOAD_REG_FPR,
+ { E_SFmode, E_DImode, RELOAD_REG_FPR,
CODE_FOR_fusion_vsx_di_sf_load,
CODE_FOR_fusion_vsx_di_sf_store },
- { SFmode, SImode, RELOAD_REG_FPR,
+ { E_SFmode, E_SImode, RELOAD_REG_FPR,
CODE_FOR_fusion_vsx_si_sf_load,
CODE_FOR_fusion_vsx_si_sf_store },
- { DFmode, DImode, RELOAD_REG_FPR,
+ { E_DFmode, E_DImode, RELOAD_REG_FPR,
CODE_FOR_fusion_vsx_di_df_load,
CODE_FOR_fusion_vsx_di_df_store },
- { DFmode, SImode, RELOAD_REG_FPR,
+ { E_DFmode, E_SImode, RELOAD_REG_FPR,
CODE_FOR_fusion_vsx_si_df_load,
CODE_FOR_fusion_vsx_si_df_store },
- { DImode, DImode, RELOAD_REG_FPR,
+ { E_DImode, E_DImode, RELOAD_REG_FPR,
CODE_FOR_fusion_vsx_di_di_load,
CODE_FOR_fusion_vsx_di_di_store },
- { DImode, SImode, RELOAD_REG_FPR,
+ { E_DImode, E_SImode, RELOAD_REG_FPR,
CODE_FOR_fusion_vsx_si_di_load,
CODE_FOR_fusion_vsx_si_di_store },
- { QImode, DImode, RELOAD_REG_GPR,
+ { E_QImode, E_DImode, RELOAD_REG_GPR,
CODE_FOR_fusion_gpr_di_qi_load,
CODE_FOR_fusion_gpr_di_qi_store },
- { QImode, SImode, RELOAD_REG_GPR,
+ { E_QImode, E_SImode, RELOAD_REG_GPR,
CODE_FOR_fusion_gpr_si_qi_load,
CODE_FOR_fusion_gpr_si_qi_store },
- { HImode, DImode, RELOAD_REG_GPR,
+ { E_HImode, E_DImode, RELOAD_REG_GPR,
CODE_FOR_fusion_gpr_di_hi_load,
CODE_FOR_fusion_gpr_di_hi_store },
- { HImode, SImode, RELOAD_REG_GPR,
+ { E_HImode, E_SImode, RELOAD_REG_GPR,
CODE_FOR_fusion_gpr_si_hi_load,
CODE_FOR_fusion_gpr_si_hi_store },
- { SImode, DImode, RELOAD_REG_GPR,
+ { E_SImode, E_DImode, RELOAD_REG_GPR,
CODE_FOR_fusion_gpr_di_si_load,
CODE_FOR_fusion_gpr_di_si_store },
- { SImode, SImode, RELOAD_REG_GPR,
+ { E_SImode, E_SImode, RELOAD_REG_GPR,
CODE_FOR_fusion_gpr_si_si_load,
CODE_FOR_fusion_gpr_si_si_store },
- { SFmode, DImode, RELOAD_REG_GPR,
+ { E_SFmode, E_DImode, RELOAD_REG_GPR,
CODE_FOR_fusion_gpr_di_sf_load,
CODE_FOR_fusion_gpr_di_sf_store },
- { SFmode, SImode, RELOAD_REG_GPR,
+ { E_SFmode, E_SImode, RELOAD_REG_GPR,
CODE_FOR_fusion_gpr_si_sf_load,
CODE_FOR_fusion_gpr_si_sf_store },
- { DImode, DImode, RELOAD_REG_GPR,
+ { E_DImode, E_DImode, RELOAD_REG_GPR,
CODE_FOR_fusion_gpr_di_di_load,
CODE_FOR_fusion_gpr_di_di_store },
- { DFmode, DImode, RELOAD_REG_GPR,
+ { E_DFmode, E_DImode, RELOAD_REG_GPR,
CODE_FOR_fusion_gpr_di_df_load,
CODE_FOR_fusion_gpr_di_df_store },
};
if (nonvoid)
{
- machine_mode tmode = (uses_spr) ? insn_op->mode : SImode;
+ machine_mode tmode = (uses_spr) ? insn_op->mode : E_SImode;
if (!target
|| GET_MODE (target) != tmode
|| (uses_spr && !(*insn_op->predicate) (target, tmode)))
struct mduc_reg_type mduc_regs[] =
{
- {0xf00e8, QImode},
- {0xffff0, HImode},
- {0xffff2, HImode},
- {0xf2224, HImode},
- {0xf00e0, HImode},
- {0xf00e2, HImode}
+ {0xf00e8, E_QImode},
+ {0xffff0, E_HImode},
+ {0xffff2, E_HImode},
+ {0xf2224, E_HImode},
+ {0xf00e0, E_HImode},
+ {0xf00e2, E_HImode}
};
struct GTY(()) machine_function
};
static const struct fuse_insns addis_insns[] = {
- { SFmode, DImode, RELOAD_REG_FPR,
+ { E_SFmode, E_DImode, RELOAD_REG_FPR,
CODE_FOR_fusion_vsx_di_sf_load,
CODE_FOR_fusion_vsx_di_sf_store },
- { SFmode, SImode, RELOAD_REG_FPR,
+ { E_SFmode, E_SImode, RELOAD_REG_FPR,
CODE_FOR_fusion_vsx_si_sf_load,
CODE_FOR_fusion_vsx_si_sf_store },
- { DFmode, DImode, RELOAD_REG_FPR,
+ { E_DFmode, E_DImode, RELOAD_REG_FPR,
CODE_FOR_fusion_vsx_di_df_load,
CODE_FOR_fusion_vsx_di_df_store },
- { DFmode, SImode, RELOAD_REG_FPR,
+ { E_DFmode, E_SImode, RELOAD_REG_FPR,
CODE_FOR_fusion_vsx_si_df_load,
CODE_FOR_fusion_vsx_si_df_store },
- { DImode, DImode, RELOAD_REG_FPR,
+ { E_DImode, E_DImode, RELOAD_REG_FPR,
CODE_FOR_fusion_vsx_di_di_load,
CODE_FOR_fusion_vsx_di_di_store },
- { DImode, SImode, RELOAD_REG_FPR,
+ { E_DImode, E_SImode, RELOAD_REG_FPR,
CODE_FOR_fusion_vsx_si_di_load,
CODE_FOR_fusion_vsx_si_di_store },
- { QImode, DImode, RELOAD_REG_GPR,
+ { E_QImode, E_DImode, RELOAD_REG_GPR,
CODE_FOR_fusion_gpr_di_qi_load,
CODE_FOR_fusion_gpr_di_qi_store },
- { QImode, SImode, RELOAD_REG_GPR,
+ { E_QImode, E_SImode, RELOAD_REG_GPR,
CODE_FOR_fusion_gpr_si_qi_load,
CODE_FOR_fusion_gpr_si_qi_store },
- { HImode, DImode, RELOAD_REG_GPR,
+ { E_HImode, E_DImode, RELOAD_REG_GPR,
CODE_FOR_fusion_gpr_di_hi_load,
CODE_FOR_fusion_gpr_di_hi_store },
- { HImode, SImode, RELOAD_REG_GPR,
+ { E_HImode, E_SImode, RELOAD_REG_GPR,
CODE_FOR_fusion_gpr_si_hi_load,
CODE_FOR_fusion_gpr_si_hi_store },
- { SImode, DImode, RELOAD_REG_GPR,
+ { E_SImode, E_DImode, RELOAD_REG_GPR,
CODE_FOR_fusion_gpr_di_si_load,
CODE_FOR_fusion_gpr_di_si_store },
- { SImode, SImode, RELOAD_REG_GPR,
+ { E_SImode, E_SImode, RELOAD_REG_GPR,
CODE_FOR_fusion_gpr_si_si_load,
CODE_FOR_fusion_gpr_si_si_store },
- { SFmode, DImode, RELOAD_REG_GPR,
+ { E_SFmode, E_DImode, RELOAD_REG_GPR,
CODE_FOR_fusion_gpr_di_sf_load,
CODE_FOR_fusion_gpr_di_sf_store },
- { SFmode, SImode, RELOAD_REG_GPR,
+ { E_SFmode, E_SImode, RELOAD_REG_GPR,
CODE_FOR_fusion_gpr_si_sf_load,
CODE_FOR_fusion_gpr_si_sf_store },
- { DImode, DImode, RELOAD_REG_GPR,
+ { E_DImode, E_DImode, RELOAD_REG_GPR,
CODE_FOR_fusion_gpr_di_di_load,
CODE_FOR_fusion_gpr_di_di_store },
- { DFmode, DImode, RELOAD_REG_GPR,
+ { E_DFmode, E_DImode, RELOAD_REG_GPR,
CODE_FOR_fusion_gpr_di_df_load,
CODE_FOR_fusion_gpr_di_df_store },
};
if (nonvoid)
{
- machine_mode tmode = (uses_spr) ? insn_op->mode : SImode;
+ machine_mode tmode = (uses_spr) ? insn_op->mode : E_SImode;
if (!target
|| GET_MODE (target) != tmode
|| (uses_spr && !(*insn_op->predicate) (target, tmode)))
/* The mode that should be generally used to store a register by
itself in the stack, or to load it back. */
#define REGISTER_NATURAL_MODE(REGNO) \
- (FP_REGISTER_P (REGNO) ? SFmode : XD_REGISTER_P (REGNO) ? DFmode : SImode)
+ (FP_REGISTER_P (REGNO) ? E_SFmode \
+ : XD_REGISTER_P (REGNO) ? E_DFmode : E_SImode)
#define FIRST_PSEUDO_REGISTER 156
if (reg0 && reg1)
{
- mode = SPARC_INT_REG_P (i) ? DImode : DFmode;
+ mode = SPARC_INT_REG_P (i) ? E_DImode : E_DFmode;
regno = i;
}
else if (reg0)
{
- mode = SPARC_INT_REG_P (i) ? SImode : SFmode;
+ mode = SPARC_INT_REG_P (i) ? E_SImode : E_SFmode;
regno = i;
}
else if (reg1)
{
- mode = SPARC_INT_REG_P (i) ? SImode : SFmode;
+ mode = SPARC_INT_REG_P (i) ? E_SImode : E_SFmode;
regno = i + 1;
offset += 4;
}
if (GET_CODE (x) == MEM
&& (GET_MODE (x) == DFmode || GET_MODE (x) == DImode))
{
- x = adjust_address (x, GET_MODE (x) == DFmode ? SFmode : SImode, 4);
+ x = adjust_address (x, GET_MODE (x) == DFmode ? E_SFmode : E_SImode,
+ 4);
output_address (GET_MODE (x), XEXP (x, 0));
}
else
#define NUM_MODE_INT \
(MAX_MODE_INT - MIN_MODE_INT + 1)
#define NUM_MODE_PARTIAL_INT \
- (MIN_MODE_PARTIAL_INT == VOIDmode ? 0 \
+ (MIN_MODE_PARTIAL_INT == E_VOIDmode ? 0 \
: MAX_MODE_PARTIAL_INT - MIN_MODE_PARTIAL_INT + 1)
#define NUM_MODE_VECTOR_INT \
- (MIN_MODE_VECTOR_INT == VOIDmode ? 0 \
+ (MIN_MODE_VECTOR_INT == E_VOIDmode ? 0 \
: MAX_MODE_VECTOR_INT - MIN_MODE_VECTOR_INT + 1)
#define NUM_MODE_IP_INT (NUM_MODE_INT + NUM_MODE_PARTIAL_INT)
for_all_modes (c, m)
if (!m->need_bytesize_adj)
- printf (" case %smode: return %u;\n", m->name, m->bytesize);
+ printf (" case E_%smode: return %u;\n", m->name, m->bytesize);
puts ("\
default: return mode_size[mode];\n\
{");
for_all_modes (c, m)
- printf (" case %smode: return %u;\n", m->name, m->ncomponents);
+ printf (" case E_%smode: return %u;\n", m->name, m->ncomponents);
puts ("\
default: return mode_nunits[mode];\n\
{");
for_all_modes (c, m)
- printf (" case %smode: return %smode;\n", m->name,
+ printf (" case E_%smode: return E_%smode;\n", m->name,
c != MODE_PARTIAL_INT && m->component
? m->component->name : m->name);
if (c != MODE_PARTIAL_INT && m2->component)
m2 = m2->component;
if (!m2->need_bytesize_adj)
- printf (" case %smode: return %u;\n", name, m2->bytesize);
+ printf (" case E_%smode: return %u;\n", name, m2->bytesize);
}
puts ("\
struct mode_data *m2
= (c != MODE_PARTIAL_INT && m->component) ? m->component : m;
if (m2->precision != (unsigned int)-1)
- printf (" case %smode: return %u;\n", m->name, m2->precision);
+ printf (" case E_%smode: return %u;\n", m->name, m2->precision);
else
- printf (" case %smode: return %u*BITS_PER_UNIT;\n",
+ printf (" case E_%smode: return %u*BITS_PER_UNIT;\n",
m->name, m2->bytesize);
}
for (c = 0; c < MAX_MODE_CLASS; c++)
for (m = modes[c]; m; m = m->next)
{
- int count_ = printf (" %smode,", m->name);
+ int count_ = printf (" E_%smode,", m->name);
printf ("%*s/* %s:%d */\n", 27 - count_, "",
trim_filename (m->file), m->line);
printf ("#define HAVE_%smode\n", m->name);
+ printf ("#define %smode E_%smode\n",
+ m->name, m->name);
}
puts (" MAX_MACHINE_MODE,\n");
first = first->next;
if (first && last)
- printf (" MIN_%s = %smode,\n MAX_%s = %smode,\n\n",
+ printf (" MIN_%s = E_%smode,\n MAX_%s = E_%smode,\n\n",
mode_class_names[c], first->name,
mode_class_names[c], last->name);
else
- printf (" MIN_%s = %smode,\n MAX_%s = %smode,\n\n",
+ printf (" MIN_%s = E_%smode,\n MAX_%s = E_%smode,\n\n",
mode_class_names[c], void_mode->name,
mode_class_names[c], void_mode->name);
}
print_decl ("unsigned char", "mode_wider", "NUM_MACHINE_MODES");
for_all_modes (c, m)
- tagged_printf ("%smode",
+ tagged_printf ("E_%smode",
m->wider ? m->wider->name : void_mode->name,
m->name);
}
if (m2 == void_mode)
m2 = 0;
- tagged_printf ("%smode",
+ tagged_printf ("E_%smode",
m2 ? m2->name : void_mode->name,
m->name);
}
print_decl ("unsigned char", "mode_complex", "NUM_MACHINE_MODES");
for_all_modes (c, m)
- tagged_printf ("%smode",
+ tagged_printf ("E_%smode",
m->complex ? m->complex->name : void_mode->name,
m->name);
print_decl ("unsigned char", "mode_inner", "NUM_MACHINE_MODES");
for_all_modes (c, m)
- tagged_printf ("%smode",
+ tagged_printf ("E_%smode",
c != MODE_PARTIAL_INT && m->component
? m->component->name : m->name,
m->name);
{
printf ("\n /* %s:%d */\n s = %s;\n",
a->file, a->line, a->adjustment);
- printf (" mode_size[%smode] = s;\n", a->mode->name);
- printf (" mode_unit_size[%smode] = s;\n", a->mode->name);
- printf (" mode_base_align[%smode] = s & (~s + 1);\n",
+ printf (" mode_size[E_%smode] = s;\n", a->mode->name);
+ printf (" mode_unit_size[E_%smode] = s;\n", a->mode->name);
+ printf (" mode_base_align[E_%smode] = s & (~s + 1);\n",
a->mode->name);
for (m = a->mode->contained; m; m = m->next_cont)
{
case MODE_COMPLEX_INT:
case MODE_COMPLEX_FLOAT:
- printf (" mode_size[%smode] = 2*s;\n", m->name);
- printf (" mode_unit_size[%smode] = s;\n", m->name);
- printf (" mode_base_align[%smode] = s & (~s + 1);\n",
+ printf (" mode_size[E_%smode] = 2*s;\n", m->name);
+ printf (" mode_unit_size[E_%smode] = s;\n", m->name);
+ printf (" mode_base_align[E_%smode] = s & (~s + 1);\n",
m->name);
break;
case MODE_VECTOR_UFRACT:
case MODE_VECTOR_ACCUM:
case MODE_VECTOR_UACCUM:
- printf (" mode_size[%smode] = %d*s;\n",
+ printf (" mode_size[E_%smode] = %d*s;\n",
m->name, m->ncomponents);
- printf (" mode_unit_size[%smode] = s;\n", m->name);
- printf (" mode_base_align[%smode] = (%d*s) & (~(%d*s)+1);\n",
+ printf (" mode_unit_size[E_%smode] = s;\n", m->name);
+ printf (" mode_base_align[E_%smode] = (%d*s) & (~(%d*s)+1);\n",
m->name, m->ncomponents, m->ncomponents);
break;
{
printf ("\n /* %s:%d */\n s = %s;\n",
a->file, a->line, a->adjustment);
- printf (" mode_base_align[%smode] = s;\n", a->mode->name);
+ printf (" mode_base_align[E_%smode] = s;\n", a->mode->name);
for (m = a->mode->contained; m; m = m->next_cont)
{
{
case MODE_COMPLEX_INT:
case MODE_COMPLEX_FLOAT:
- printf (" mode_base_align[%smode] = s;\n", m->name);
+ printf (" mode_base_align[E_%smode] = s;\n", m->name);
break;
case MODE_VECTOR_INT:
case MODE_VECTOR_UFRACT:
case MODE_VECTOR_ACCUM:
case MODE_VECTOR_UACCUM:
- printf (" mode_base_align[%smode] = %d*s;\n",
+ printf (" mode_base_align[E_%smode] = %d*s;\n",
m->name, m->ncomponents);
break;
{
printf ("\n /* %s:%d */\n s = %s;\n",
a->file, a->line, a->adjustment);
- printf (" mode_ibit[%smode] = s;\n", a->mode->name);
+ printf (" mode_ibit[E_%smode] = s;\n", a->mode->name);
}
/* Fbit adjustments don't have to propagate. */
{
printf ("\n /* %s:%d */\n s = %s;\n",
a->file, a->line, a->adjustment);
- printf (" mode_fbit[%smode] = s;\n", a->mode->name);
+ printf (" mode_fbit[E_%smode] = s;\n", a->mode->name);
}
/* Real mode formats don't have to propagate anywhere. */
for (a = adj_format; a; a = a->next)
- printf ("\n /* %s:%d */\n REAL_MODE_FORMAT (%smode) = %s;\n",
+ printf ("\n /* %s:%d */\n REAL_MODE_FORMAT (E_%smode) = %s;\n",
a->file, a->line, a->mode->name, a->adjustment);
puts ("}");
m = mode_sort[i];
printf(" {\n");
tagged_printf ("%u", m->int_n, m->name);
- printf ("%smode,", m->name);
+ printf ("E_%smode,", m->name);
printf(" },\n");
}
static struct operand_data null_operand =
{
- 0, 0, "", "", VOIDmode, 0, 0, 0, 0, 0
+ 0, 0, "", "", E_VOIDmode, 0, 0, 0, 0, 0
};
static struct operand_data *odata = &null_operand;
printf (" \"%s\",\n", d->constraint ? d->constraint : "");
- printf (" %smode,\n", GET_MODE_NAME (d->mode));
+ printf (" E_%smode,\n", GET_MODE_NAME (d->mode));
printf (" %d,\n", d->strict_low);
break;
case parameter::MODE:
- printf ("%smode", GET_MODE_NAME ((machine_mode) param.value));
+ printf ("E_%smode", GET_MODE_NAME ((machine_mode) param.value));
break;
case parameter::INT:
{
NULL, /* alternative */
0, /* early_clobber_alts */
- VOIDmode, /* We are not interesting in the operand mode. */
+ E_VOIDmode, /* We are not interesting in the operand mode. */
OP_IN,
0, 0, 0, 0
};
projects / platform / upstream / gcc.git / commitdiff