VPP: Set the alpha channel when doing the conversion from NV12 to RGBA on Ivy/Haswell/BDW
authorZhao Yakui <yakui.zhao@intel.com>
Tue, 22 Apr 2014 03:05:18 +0000 (11:05 +0800)
committerXiang, Haihao <haihao.xiang@intel.com>
Wed, 23 Apr 2014 06:27:13 +0000 (14:27 +0800)
Currently zero is written to alpha channel when doing the conversion
from NV12 to RGBA(BGRA), which affects the following the rendering operation.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
(cherry picked from commit 4082c9db1eef45bc117fc151d60a178926ab9f73)

src/gen8_post_processing.c
src/i965_post_processing.c
src/i965_post_processing.h

index 4fbc01e..f076830 100644 (file)
@@ -973,6 +973,7 @@ gen8_pp_plx_avs_initialize(VADriverContextP ctx, struct i965_post_processing_con
     pp_static_parameter->grf2.avs_wa_width = src_width;
     pp_static_parameter->grf2.avs_wa_one_div_256_width = (float) 1.0 / (256 * src_width);
     pp_static_parameter->grf2.avs_wa_five_div_256_width = (float) 5.0 / (256 * src_width);
+    pp_static_parameter->grf2.alpha = 255;
 
     pp_static_parameter->grf3.sampler_load_horizontal_scaling_step_ratio = (float) pp_avs_context->src_w / dw;
     pp_static_parameter->grf4.sampler_load_vertical_scaling_step = (float) src_rect->height / src_height / dst_rect->height;
index 3dc7d8c..95b20e4 100755 (executable)
@@ -2953,6 +2953,7 @@ gen7_pp_plx_avs_initialize(VADriverContextP ctx, struct i965_post_processing_con
     pp_static_parameter->grf2.avs_wa_width = dw;
     pp_static_parameter->grf2.avs_wa_one_div_256_width = (float) 1.0 / (256 * dw);
     pp_static_parameter->grf2.avs_wa_five_div_256_width = (float) 5.0 / (256 * dw);
+    pp_static_parameter->grf2.alpha = 255;
 
     pp_static_parameter->grf3.sampler_load_horizontal_scaling_step_ratio = (float) pp_avs_context->src_w / dw;
     pp_static_parameter->grf4.sampler_load_vertical_scaling_step = (float) src_rect->height / src_height / dst_rect->height;
index 29b8cdc..fd4cbcf 100755 (executable)
@@ -380,7 +380,7 @@ struct gen7_pp_static_parameter
         unsigned int di_destination_packed_y_component_offset:8;
         unsigned int di_destination_packed_u_component_offset:8;
         unsigned int di_destination_packed_v_component_offset:8;
-        unsigned int pad0:8;
+        unsigned int alpha:8;
     } grf2;
 
     struct {