spi: cadence-qspi: Remove condition for calling enable linear mode
authorAshok Reddy Soma <ashok.reddy.soma@amd.com>
Tue, 29 Nov 2022 11:41:34 +0000 (04:41 -0700)
committerMichal Simek <michal.simek@amd.com>
Mon, 5 Dec 2022 07:55:55 +0000 (08:55 +0100)
cadence_qspi_apb_enable_linear_mode() has a weak function defined, so no
need to gaurd this under if (CONFIG_IS_ENABLED(ARCH_VERSAL)).

In cadence_qspi_apb_write_execute(), enable linear mode is called twice by
mistake, remove extra one.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20221129114134.18909-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
drivers/spi/cadence_qspi_apb.c

index cfae5dc..d1f8913 100644 (file)
@@ -735,8 +735,7 @@ int cadence_qspi_apb_read_execute(struct cadence_spi_priv *priv,
        void *buf = op->data.buf.in;
        size_t len = op->data.nbytes;
 
-       if (CONFIG_IS_ENABLED(ARCH_VERSAL))
-               cadence_qspi_apb_enable_linear_mode(true);
+       cadence_qspi_apb_enable_linear_mode(true);
 
        if (priv->use_dac_mode && (from + len < priv->ahbsize)) {
                if (len < 256 ||
@@ -905,9 +904,6 @@ int cadence_qspi_apb_write_execute(struct cadence_spi_priv *priv,
        const void *buf = op->data.buf.out;
        size_t len = op->data.nbytes;
 
-       if (CONFIG_IS_ENABLED(ARCH_VERSAL))
-               cadence_qspi_apb_enable_linear_mode(true);
-
        /*
         * Some flashes like the Cypress Semper flash expect a dummy 4-byte
         * address (all 0s) with the read status register command in DTR mode.