Siddharth Vadapalli says:
====================
J7200: CPSW5G: Add support for QSGMII mode to am65-cpsw driver
Add support for QSGMII mode to am65-cpsw driver.
Change log:
v4-> v5:
1. Move ti,j7200-cpswxg-nuss compatible to the line above the
ti,j721e-cpsw-nuss compatible.
2. Add allOf and move if-then statements within it to allow future if-then
statements to be added easily.
v3 -> v4:
1. Update bindings to disallow ports based on compatible, instead of
adding a new if/then statement for the new compatible.
2. Add Else-If condition for RMII mode in the set of supported interfaces.
Support for RMII mode is already present in the driver and I had
missed out adding a condition for RMII mode in the previous patches.
v2 -> v3:
1. In ti,k3-am654-cpsw-nuss.yaml, restrict if/then statement to port
nodes.
v1 -> v2:
1. Add new compatible for CPSW5G in ti,k3-am654-cpsw-nuss.yaml and extend
properties for new compatible.
2. Add extra_modes member to struct am65_cpsw_pdata to be used for QSGMII
mode by new compatible.
3. Add check for phylink supported modes to ensure that only one phy mode
is advertised as supported.
4. Check if extra_modes supports QSGMII mode in am65_cpsw_nuss_mac_config()
for register write.
5. Add check for assigning port->sgmii_base only when extra_modes is valid.
v4: https://lore.kernel.org/r/
20220816060139.111934-1-s-vadapalli@ti.com/
v3: https://lore.kernel.org/r/
20220606110443.30362-1-s-vadapalli@ti.com/
v2: https://lore.kernel.org/r/
20220602114558.6204-1-s-vadapalli@ti.com/
v1: https://lore.kernel.org/r/
20220531113058.23708-1-s-vadapalli@ti.com/
====================
Signed-off-by: David S. Miller <davem@davemloft.net>