soc: mediatek: mtk-pm-domains: Allow mt8186 ADSP default power on

In the use case of configuring the access permissions of the ADSP core,
the mt8186 SoC ADSP power will be switched on in the bootloader because
the permission control registers are located in the ADSP subsys.

Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Fixes: 88590cbc1703 ("soc: mediatek: pm-domains: Add support for mt8186")
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20221012075434.30009-1-tinghan.shen@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/drivers/soc/mediatek/mt8186-pm-domains.h b/drivers/soc/mediatek/mt8186-pm-domains.h
index 108af61..fce86f7 100644 (file)
--- a/drivers/soc/mediatek/mt8186-pm-domains.h
+++ b/drivers/soc/mediatek/mt8186-pm-domains.h
@@ -304,7 +304,6 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8186[] = {
                .ctl_offs = 0x9FC,
                .pwr_sta_offs = 0x16C,
                .pwr_sta2nd_offs = 0x170,
-               .caps = MTK_SCPD_KEEP_DEFAULT_OFF,
        },
        [MT8186_POWER_DOMAIN_ADSP_INFRA] = {
                .name = "adsp_infra",
@@ -312,7 +311,6 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8186[] = {
                .ctl_offs = 0x9F8,
                .pwr_sta_offs = 0x16C,
                .pwr_sta2nd_offs = 0x170,
-               .caps = MTK_SCPD_KEEP_DEFAULT_OFF,
        },
        [MT8186_POWER_DOMAIN_ADSP_TOP] = {
                .name = "adsp_top",
@@ -332,7 +330,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8186[] = {
                                MT8186_TOP_AXI_PROT_EN_3_CLR,
                                MT8186_TOP_AXI_PROT_EN_3_STA),
                },
-               .caps = MTK_SCPD_SRAM_ISO | MTK_SCPD_KEEP_DEFAULT_OFF | MTK_SCPD_ACTIVE_WAKEUP,
+               .caps = MTK_SCPD_SRAM_ISO | MTK_SCPD_ACTIVE_WAKEUP,
        },
 };