RISCVMatInt::generateInstSeq(Value, getSTI().getFeatureBits());
MCRegister SrcReg = RISCV::X0;
- for (RISCVMatInt::Inst &Inst : Seq) {
+ for (const RISCVMatInt::Inst &Inst : Seq) {
switch (Inst.getOpndKind()) {
case RISCVMatInt::Imm:
emitToStreamer(Out,
static SDValue selectImmSeq(SelectionDAG *CurDAG, const SDLoc &DL, const MVT VT,
RISCVMatInt::InstSeq &Seq) {
SDValue SrcReg = CurDAG->getRegister(RISCV::X0, VT);
- for (RISCVMatInt::Inst &Inst : Seq) {
+ for (const RISCVMatInt::Inst &Inst : Seq) {
SDValue SDImm = CurDAG->getTargetConstant(Inst.getImm(), DL, VT);
SDNode *Result = nullptr;
switch (Inst.getOpndKind()) {
RISCVMatInt::generateInstSeq(Val, STI.getFeatureBits());
assert(!Seq.empty());
- for (RISCVMatInt::Inst &Inst : Seq) {
+ for (const RISCVMatInt::Inst &Inst : Seq) {
switch (Inst.getOpndKind()) {
case RISCVMatInt::Imm:
BuildMI(MBB, MBBI, DL, get(Inst.getOpcode()), DstReg)