mt753x_cpu_port_enable(struct dsa_switch *ds, int port)
{
struct mt7530_priv *priv = ds->priv;
+ int ret;
/* Setup max capability of CPU port at first */
- if (priv->info->cpu_port_config)
- priv->info->cpu_port_config(ds, port);
+ if (priv->info->cpu_port_config) {
+ ret = priv->info->cpu_port_config(ds, port);
+ if (ret)
+ return ret;
+ }
/* Enable Mediatek header mode on the cpu port */
mt7530_write(priv, MT7530_PVC_P(port),
mt7530_rmw(priv, MT7530_PCR_P(i), PCR_MATRIX_MASK,
PCR_MATRIX_CLR);
- if (dsa_is_cpu_port(ds, i))
- mt753x_cpu_port_enable(ds, i);
- else
+ if (dsa_is_cpu_port(ds, i)) {
+ ret = mt753x_cpu_port_enable(ds, i);
+ if (ret)
+ return ret;
+ } else
mt7530_port_disable(ds, i);
/* Enable consistent egress tag */
mt7530_set(priv, MT7531_DBG_CNT(i), MT7531_DIS_CLR);
- if (dsa_is_cpu_port(ds, i))
- mt753x_cpu_port_enable(ds, i);
- else
+ if (dsa_is_cpu_port(ds, i)) {
+ ret = mt753x_cpu_port_enable(ds, i);
+ if (ret)
+ return ret;
+ } else
mt7530_port_disable(ds, i);
/* Enable consistent egress tag */
struct mt7530_priv *priv = ds->priv;
phy_interface_t interface;
int speed;
+ int ret;
switch (port) {
case 5:
priv->p6_interface = interface;
break;
+ default:
+ return -EINVAL;
}
if (interface == PHY_INTERFACE_MODE_2500BASEX)
else
speed = SPEED_1000;
- mt7531_mac_config(ds, port, MLO_AN_FIXED, interface);
+ ret = mt7531_mac_config(ds, port, MLO_AN_FIXED, interface);
+ if (ret)
+ return ret;
mt7530_write(priv, MT7530_PMCR_P(port),
PMCR_CPU_PORT_SETTING(priv->id));
mt753x_phylink_mac_link_up(ds, port, MLO_AN_FIXED, interface, NULL,