axs101: bump DDR size from 256 to 512 Mb
authorAlexey Brodkin <abrodkin@synopsys.com>
Thu, 27 Mar 2014 15:30:18 +0000 (19:30 +0400)
committerAlexey Brodkin <abrodkin@synopsys.com>
Fri, 25 Apr 2014 14:00:23 +0000 (18:00 +0400)
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
include/configs/axs101.h

index 8d03110..c22d6d0 100644 (file)
@@ -16,7 +16,7 @@
 #define CONFIG_SYS_CLK_FREQ            750000000
 #define CONFIG_SYS_TIMER_RATE          CONFIG_SYS_CLK_FREQ
 
-/* dwgmac doesn't work with D$ enabled now */
+/* NAND controller DMA doesn't work correctly with D$ enabled */
 #define CONFIG_SYS_DCACHE_OFF
 
 /*
@@ -40,7 +40,7 @@
 
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x80000000
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_SYS_SDRAM_SIZE          0x10000000      /* 256 Mb */
+#define CONFIG_SYS_SDRAM_SIZE          0x20000000      /* 512 Mb */
 
 #define CONFIG_SYS_INIT_SP_ADDR                \
        (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)