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R600/SI: Add pattern for sign extension of i1 to i32.
author
Michel Danzer
<michel.daenzer@amd.com>
Fri, 22 Feb 2013 11:22:58 +0000
(11:22 +0000)
committer
Michel Danzer
<michel.daenzer@amd.com>
Fri, 22 Feb 2013 11:22:58 +0000
(11:22 +0000)
16 more little piglits with radeonsi.
NOTE: This is a candidate for the Mesa stable branch.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 175887
llvm/lib/Target/R600/SIInstructions.td
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diff --git
a/llvm/lib/Target/R600/SIInstructions.td
b/llvm/lib/Target/R600/SIInstructions.td
index
2e43f9e
..
907cf49
100644
(file)
--- a/
llvm/lib/Target/R600/SIInstructions.td
+++ b/
llvm/lib/Target/R600/SIInstructions.td
@@
-1382,6
+1382,11
@@
def : Pat <
0, 0, 0, 0), sub3)
>;
+def : Pat <
+ (i32 (sext (i1 SReg_64:$src0))),
+ (V_CNDMASK_B32_e64 (i32 0), (i32 -1), SReg_64:$src0)
+>;
+
/********** ================== **********/
/********** VOP3 Patterns **********/
/********** ================== **********/