mlxsw: trap: Add trap identifiers for mirrored packets
authorIdo Schimmel <idosch@mellanox.com>
Tue, 14 Jul 2020 14:21:03 +0000 (17:21 +0300)
committerDavid S. Miller <davem@davemloft.net>
Tue, 14 Jul 2020 21:50:49 +0000 (14:50 -0700)
Packets that are mirrored to the CPU port are trapped with one of eight
trap identifiers. Add them.

Reviewed-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: Petr Machata <petrm@mellanox.com>
Signed-off-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/mellanox/mlxsw/trap.h

index 8cbb9cf..3390988 100644 (file)
@@ -107,6 +107,14 @@ enum {
        MLXSW_TRAP_ID_ACL2 = 0x1C2,
        MLXSW_TRAP_ID_DISCARD_INGRESS_ACL = 0x1C3,
        MLXSW_TRAP_ID_DISCARD_EGRESS_ACL = 0x1C4,
+       MLXSW_TRAP_ID_MIRROR_SESSION0 = 0x220,
+       MLXSW_TRAP_ID_MIRROR_SESSION1 = 0x221,
+       MLXSW_TRAP_ID_MIRROR_SESSION2 = 0x222,
+       MLXSW_TRAP_ID_MIRROR_SESSION3 = 0x223,
+       MLXSW_TRAP_ID_MIRROR_SESSION4 = 0x224,
+       MLXSW_TRAP_ID_MIRROR_SESSION5 = 0x225,
+       MLXSW_TRAP_ID_MIRROR_SESSION6 = 0x226,
+       MLXSW_TRAP_ID_MIRROR_SESSION7 = 0x227,
 
        MLXSW_TRAP_ID_MAX = 0x3FF,
 };