[AVR] Add MIR tests for a few pseudo instructions

llvm-svn: 289031

diff --git a/llvm/test/CodeGen/AVR/pseudo/ADDWRdRr.mir b/llvm/test/CodeGen/AVR/pseudo/ADDWRdRr.mir
new file mode 100644 (file)
index 0000000..2205feb
--- /dev/null
+++ b/llvm/test/CodeGen/AVR/pseudo/ADDWRdRr.mir
@@ -0,0 +1,24 @@
+# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
+
+# This test checks the expansion of the 16-bit add pseudo instruction.
+
+--- |
+  target triple = "avr--"
+  define void @test_addwrdrr() {
+  entry:
+    ret void
+  }
+...
+
+---
+name:            test_addwrdrr
+body: |
+  bb.0.entry:
+
+    ; CHECK-LABEL: test_addwrdrr
+
+    ; CHECK:       %r14 = ADDRdRr %r14, %r20, implicit-def %sreg
+    ; CHECK-LABEL: %r15 = ADCRdRr %r15, %r21, implicit-def %sreg, implicit killed %sreg
+
+    %r15r14 = ADDWRdRr %r15r14, %r21r20, implicit-def %sreg
+...

diff --git a/llvm/test/CodeGen/AVR/pseudo/LDDWRdPtrQ.mir b/llvm/test/CodeGen/AVR/pseudo/LDDWRdPtrQ.mir
new file mode 100644 (file)
index 0000000..dd95abd
--- /dev/null
+++ b/llvm/test/CodeGen/AVR/pseudo/LDDWRdPtrQ.mir
@@ -0,0 +1,24 @@
+# RUN: llc -O0  %s -o - 2>&1 | FileCheck %s
+
+# This test checks the expansion of the 16-bit 'LDDWRdPtrQ' pseudo instruction.
+
+--- |
+  target triple = "avr--"
+  define void @test_lddwrdptrq() {
+  entry:
+    ret void
+  }
+...
+
+---
+name:            test_lddwrdptrq
+body: |
+  bb.0.entry:
+
+    ; CHECK-LABEL: test_lddwrdptrq
+
+    ; CHECK:      ldd     r30, Y+10
+    ; CHECK-NEXT: ldd     r31, Y+11
+
+    early-clobber %r31r30 = LDDWRdPtrQ %r29r28, 10
+...

diff --git a/llvm/test/CodeGen/AVR/pseudo/LDDWRdYQ.mir b/llvm/test/CodeGen/AVR/pseudo/LDDWRdYQ.mir
new file mode 100644 (file)
index 0000000..bb1ef8e
--- /dev/null
+++ b/llvm/test/CodeGen/AVR/pseudo/LDDWRdYQ.mir
@@ -0,0 +1,24 @@
+# RUN: llc -O0  %s -o - 2>&1 | FileCheck %s
+
+# This test checks the expansion of the 16-bit 'LDDWRdYQ instruction
+
+--- |
+  target triple = "avr--"
+  define void @test_lddwrdyq() {
+  entry:
+    ret void
+  }
+...
+
+---
+name:            test_lddwrdyq
+body: |
+  bb.0.entry:
+
+    ; CHECK-LABEL: test_lddwrdyq
+
+    ; CHECK:      ldd     r30, Y+1
+    ; CHECK-NEXT: ldd     r31, Y+2
+
+    early-clobber %r31r30 = LDDWRdYQ %r29r28, 1
+...